Visible to the public FPGA Implementation of Computer Network Security Protection with Machine Learning

TitleFPGA Implementation of Computer Network Security Protection with Machine Learning
Publication TypeConference Paper
Year of Publication2021
AuthorsTodorov, Z., Efnusheva, D., Nikolic, T.
Conference Name2021 IEEE 32nd International Conference on Microelectronics (MIEL)
KeywordsClassification algorithms, composability, Lead, machine learning, machine learning algorithms, Metrics, Microelectronics, Microelectronics Security, naive Bayes methods, network intrusion detection, Network security, pubcrawl, resilience, Resiliency
AbstractNetwork intrusion detection systems (NIDS) are widely used solutions targeting the security of any network device connected to the Internet and are taking the lead in the battle against intruders. This paper addresses the network security issues by implementing a hardware-based NIDS solution with a Naive Bayes machine learning (ML) algorithm for classification using NSL Knowledge Discovery in Databases (KDD) dataset. The proposed FPGA implementation of the Naive Bayes classifier focuses on low latency and provides intrusion detection in just 240ns, with accuracy/precision of 70/97%, occupying 1 % of the Virtex7 VC709 FPGA chip area.
DOI10.1109/MIEL52794.2021.9569201
Citation Keytodorov_fpga_2021