| Title | A Fully-integrated Gesture and Gait Processing SoC for Rehabilitation with ADC-less Mixed-signal Feature Extraction and Deep Neural Network for Classification and Online Training |
| Publication Type | Conference Paper |
| Year of Publication | 2020 |
| Authors | Wei, Yijie, Cao, Qiankai, Gu, Jie, Otseidu, Kofi, Hargrove, Levi |
| Conference Name | 2020 IEEE Custom Integrated Circuits Conference (CICC) |
| Keywords | Biological neural networks, Deep Neural Network, Edge Processing, feature extraction, inter-chip communication, mixed-signal feature extraction, neural network resiliency, Nonlinear distortion, on-chip learning, pubcrawl, resilience, Resiliency, system-on-chip, Training, voltage-controlled oscillators |
| Abstract | An ultra-low-power gesture and gait classification SoC is presented for rehabilitation application featuring (1) mixed-signal feature extraction and integrated low-noise amplifier eliminating expensive ADC and digital feature extraction, (2) an integrated distributed deep neural network (DNN) ASIC supporting a scalable multi-chip neural network for sensor fusion with distortion resiliency for low-cost front end modules, (3) onchip learning of DNN engine allowing in-situ training of user specific operations. A 12-channel 65nm CMOS test chip was fabricated with 1mW power per channel, less than 3ms computation latency, on-chip training for user-specific DNN model and multi-chip networking capability. |
| DOI | 10.1109/CICC48029.2020.9075910 |
| Citation Key | wei_fully-integrated_2020 |
A Fully-integrated Gesture and Gait Processing SoC for Rehabilitation with ADC-less Mixed-signal Feature Extraction and Deep Neural Network for Classification and Online Training