Secret keys that are stored and used within physical devices can be extracted by adversaries. The attacks involve measuring the power consumption or electromagnetic radiation emanating from the chip as it carries out encryption, and then analyzing them to deduce the secret key. This project investigates techniques that self-mutate the hardware at runtime as a means of significantly reducing and ideally eliminating signal information leveraged by the adversary.
The research carried out in this project investigates side-channel leakage, particularly as it relates to signal propagation paths within the encryption engine. A hardware description of the proposed self-mutating hardware will be implemented on a field-programmable gate array (FPGA) using dynamic partial reconfiguration. Multiple instances of encryption engine components, e.g., the Advanced Encryption Standard (AES) substitution box (SBOX), will be created using implementation diversity techniques as a means of diversifying signal propagation paths, and a self-reconfiguration hardware engine will randomly choose instances to reprogram on-the-fly. Advanced differential power analysis (DPA)-type attacks will be carried out to determine the resilience of the proposed countermeasures.
The techniques, data and hardware developed in this research will be integrated into undergraduate and graduate level courses at University of New Mexico, University of Maryland Baltimore County and University of North Carolina at Charlotte, and red-team/blue-team competitions will be created. Minority and underrepresented students will be recruited to participate in funded research activities.
A project repository will be created and maintained at University of North Carolina, Charlotte at the web address http://www.ece.uncc.edu/fareena/SPREAD for 5 years. The hardware description language, software, data, analysis methods and copies of the papers will be made available for download.
|