| Title | RAT: A Lightweight System-Level Soft Error Mitigation Technique |
| Publication Type | Conference Paper |
| Year of Publication | 2020 |
| Authors | Gava, Jonas, Reis, Ricardo, Ost, Luciano |
| Conference Name | 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC) |
| Date Published | oct |
| Keywords | Fault tolerance, Metrics, mitigation technique, multicore, multicore computing security, Multicore processing, pubcrawl, Redundancy, Registers, reliability, resilience, Resiliency, Safety, Scalability, soft error reliability, Tools, Very large scale integration |
| Abstract | To achieve a substantial reliability and safety level, it is imperative to provide electronic computing systems with appropriate mechanisms to tackle soft errors. This paper proposes a low-cost system-level soft error mitigation technique, which allocates the critical application function to a pool of specific general-purpose processor registers. Both the critical function and the register pool are automatically selected by a developed profiling tool. The proposed technique was validated through more than 320K fault injections considering a Linux kernel, different benchmarks and two multicore ARM processors. Results show that our technique significantly reduces the code size and performance overheads while providing reliability improvement, w.r.t. the Triple Modular Redundancy (TMR) technique. |
| DOI | 10.1109/VLSI-SOC46417.2020.9344080 |
| Citation Key | gava_rat_2020 |
RAT: A Lightweight System-Level Soft Error Mitigation Technique