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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
multicore
biblio
Developing Computer Applications without any OS or Kernel in a Multi-core Architecture
Submitted by grigby1 on Tue, 02/22/2022 - 1:42pm
Bare Machine Computing
computer architecture
pubcrawl
Metrics
UDP
Multicore processing
codes
operating system security
multicore
Web servers
Web server
multicore computing security
resilience
Resiliency
Scalability
process control
Prototypes
architecture
biblio
A Study on the Effect of Hardware Trojans in the Performance of Network on Chip Architectures
Submitted by grigby1 on Tue, 02/22/2022 - 1:41pm
Network on Chip (NoC)
Tiled Chip Multicore Processors (TCMP)
taxonomy
System performance
Scalability
Resiliency
resilience
pubcrawl
Program processors
network on chip security
Multicore processing
multicore computing security
multicore
Metrics
Hardware Trojans (HT)
Globalization
electronics industry
computer architecture
biblio
RAT: A Lightweight System-Level Soft Error Mitigation Technique
Submitted by grigby1 on Thu, 09/30/2021 - 11:07am
Reliability
Metrics
mitigation technique
multicore
multicore computing security
Multicore processing
pubcrawl
Redundancy
Registers
fault tolerance
resilience
Resiliency
Safety
Scalability
soft error reliability
tools
Very large scale integration
biblio
Multi-Fold Scheduling Algorithm for Multi-Core Multi-Processor Systems
Submitted by grigby1 on Thu, 09/30/2021 - 11:07am
Multicore processing
Acceleration
computer architecture
cube architectures
Dynamic scheduling
execution time
load imbalance factor
Metrics
multicore
multicore computing security
Throughput
packet scheduling
pubcrawl
resilience
Resiliency
Scalability
Scheduling algorithms
Task Analysis
task migration
biblio
Safe and Secure Data Fusion — Use of MILS Multicore Architecture to Reduce Cyber Threats
Submitted by aekwall on Mon, 11/16/2020 - 2:58pm
multicore-based real-time operating system
data fusion-based systems
flexible software architectures
functional assurance capabilities
High Robustness
high-robustness separation kernel certification
INTEGRITY-178 tuMP
MILS multicore architecture
multicore
multicore processor
cyber-attack space
multiple independent levels
restricted hardware access
RTOS
Separation Kernel
single-core processors
system providers
system security architecture
Resilient Security Architectures
operating systems (computers)
Resiliency
pubcrawl
Software Architecture
sensor fusion
data flows
aerospace computing
safety-critical software
scheduling
telecommunication security
security risks
multiprocessing systems
MILS
air traffic safety
architecture configurations
civil aircraft systems safety
covert channel prevention
cyber threats reduction
biblio
DyAdHyTM: A Low Overhead Dynamically Adaptive Hybrid Transactional Memory with Application to Large Graphs
Submitted by grigby1 on Fri, 09/28/2018 - 4:05pm
Cybersecurity
resilience
pubcrawl
Resiliency
Human behavior
policy-based governance
graph applications
hybrid transactional memory
in-memory processing
multicore
Synchronization
E-Government
biblio
PIPSEA: A Practical IPsec Gateway on Embedded APUs
Submitted by grigby1 on Thu, 05/18/2017 - 2:17pm
APU
Cryptography
gpu
Heterogeneous computing
IPsec
Metrics
multicore
multicore computing security
openCL
pubcrawl
Resiliency
Scalability
biblio
Rethinking Operating System Design: Asymmetric Multiprocessing for Security and Performance
Submitted by grigby1 on Thu, 05/18/2017 - 2:17pm
Metrics
multicore
multicore computing security
pubcrawl
Resiliency
Scalability
biblio
Simulation and Analysis Engine for Scale-Out Workloads
Submitted by grigby1 on Thu, 05/18/2017 - 2:17pm
analysis
Big Data
full-system
instrumentation
JIT
Metrics
multicore
multicore computing security
multisystem
pubcrawl
Resiliency
Scalability
scale-out
transparency
biblio
On the Capacity of Thermal Covert Channels in Multicores
Submitted by grigby1 on Thu, 05/18/2017 - 2:17pm
achievable rate
capacity bound
covert channel
Metrics
multicore
multicore computing security
pubcrawl
Resiliency
Scalability
thermal
transmission scheme
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