Submitted by Anonymous on Thu, 01/28/2016 - 3:28pm
1st IFAC/IFIP Workshop on Computers and Control (WOCO 2016)
Sponsored and Organised by IFAC TC3.1 Technical Committee on Computers for Control Co-Sponsored by IFIP WG 10.5 Design and Engineering of Electronic Systems
WOCO 2016 is the first IFAC Workshop on Computer and Control following previous workshops organized by IFAC Technical Committee 3.3 as Workshop on Real-Time Programming (WRTP) and Algorithms and Architectures for Real-Time Control (AARTC) that were successfully organised during 30 editions.
General purpose operating systems (OS) are concurrent and multithread, and the primary goal of thread scheduler is to enforce fairness among all threads. This design is unsuitable for Real-Time (RT) systems, because tasks have soft or hard deadline of finishing time. Concurrency breaks timing of RT applications because users never know when their program is actually running. Explicitly allocation of processor resource to programs (threads) is thus necessary for timing-aware applications.
It's common in controller design to assume that the controller reads the sensors and writes to the actuators at the same time instant. This assumption is often violated in practice because the controller executes its code sequentially on a microprocessor. If the microprocessor is "fast enough," often the controller will still work.
