Skip to Main Content Area
CPS-VO
Contact Support
Browse
Calendar
Announcements
Repositories
Groups
Search
Search for Content
Search for a Group
Search for People
Search for a Project
Tagcloud
› Go to login screen
Not a member?
Click here to register!
Forgot username or password?
Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
AES-256
biblio
System Level Hardware Trojan Detection Using Side-Channel Power Analysis and Machine Learning
Submitted by grigby1 on Wed, 05/26/2021 - 10:39am
AES-256
chipwhisperer
CPS Privacy
cyber physical systems
Hardware Security
hardware trojan
Human behavior
Human Factors
machine learning
privacy
pubcrawl
side-channel power analysis
system-level
biblio
Message Security Through AES and LSB Embedding in Edge Detected Pixels of 3D Images
Submitted by grigby1 on Mon, 02/08/2021 - 1:01pm
security
Metrics
MSE
peak signal-to-noise ratio
PSNR
pubcrawl
resilience
Resiliency
Scalability
message security
SSIM
Steganography
stereo image processing
structural similarity index measure
Three-dimensional displays
Two dimensional displays
visualization
Image coding
AES-256
AES–256
composability
Cryptography
Data Security
edge detected pixels
edge detection
Entropy
3D cover images
Image edge detection
LSB embedding
LSB steganography
MAE
mean absolute error
mean square error
mean square error methods
biblio
FPGA based hardware implementation of AES Rijndael algorithm for Encryption and Decryption
Submitted by grigby1 on Thu, 04/20/2017 - 11:40am
secure data transmission
Inverse S-Box transformations
network on chip
network on chip security
network security algorithm
pre-calculated look-up tables
precalculated LUT
pubcrawl
Resiliency
Rijndael
Scalability
inverse mix-columns transformations
Table lookup
timing
Verilog-HDL
Virtex-7 XC7VX690T chip
wired digital communication networks
wireless digital communication networks
Xilinx ISE Design Suite-14.7 Tool
Xilinx Virtex-7 FPGA
Xilinx XPower Analyzer
decryption
AES-128
AES-192
AES-256
AES Rijndael algorithm
Algorithm design and analysis
algorithmic functions
Clocks
composability
Cryptography
advanced encryption standard (AES)
encryption
Field Programmable Gate Array (FPGA)
field programmable gate arrays
FPGA based hardware implementation
Galois field multiplications
Galois fields
GF (28)
Hardware Description Language (HDL)
hardware description languages