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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
speculative execution
biblio
BranchSpec: Information Leakage Attacks Exploiting Speculative Branch Instruction Executions
Submitted by aekwall on Mon, 03/15/2021 - 11:10am
Side Channel
BranchSpec attacks
called BranchSpec
Coffee Lake-based processors
existing speculative attacks
harness branch predictors
information leakage attacks
information leakage threat
microarchitectural attack
microarchitectural side channels
processor hardware vulnerabilities
processor microarchitectural components
processor microarchitecture
branch predictor
simpler code patterns
speculative branch executions
speculative branch instruction executions
speculative execution
speculative executions
speculative path
speculative state update
speculatively executed branches
Transient Execution Attack
transient execution attacks
transient executions
victim
microprocessor chips
Scalability
Conferences
telecommunication security
Hardware
attack surface
History
information security
Resiliency
pubcrawl
Metrics
security vulnerability
Transient analysis
security of data
Compositionality
Instruction sets
program compilers
microarchitecture
Spectre
compiler security
Surface treatment
sensitive information
computer architecture
parallel architectures
branch pattern history structure
branch prediction mechanisms
biblio
Hiding the Long Latency of Persist Barriers Using Speculative Execution
Submitted by grigby1 on Wed, 05/09/2018 - 1:56pm
resilience
nonvolatile memory technology
NVMM
pcommit
performance bottleneck
performance overhead
persist barriers
persistence instructions
policy-based governance
Policy-Governed Secure Collaboration
pubcrawl
Random access memory
random-access storage
Nonvolatile memory
Resiliency
Safe Coding
Safety
significant execution time overhead
Software
speculative execution
Speculative Persistence
speculative persistence architecture
storage management
substantial performance boost
volatile caches
fail-safe code
checkpoint-based processing
checkpointing
clflushopt
clwb
collaboration
common data structures
consistent state
data structures
DRAM
DRAM chips
expensive fence operations
cache storage
Failure Safety
file system
Force
Human Factors
logging based transactions
long latency persistency operations
Metrics
modern systems reorder memory operations
non-volatile main memory
nonpersistent implementations
NonVolatile Main Memory
