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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
integrated chip design
biblio
Improving Power amp; Latency Metrics for Hardware Trojan Detection During High Level Synthesis
Submitted by grigby1 on Mon, 12/10/2018 - 11:42am
Mathematical model
work factor metrics
Unroll Factor
Trojan horses
third party IP cores
Space exploration
semiconductor industry
secure IC design process
Scalability
resource allocation
Resiliency
resilience
pubcrawl
power metrics
power consumption
microprocessor chips
adders
latency metrics
invasive software
integrated circuits
integrated circuit design
integrated chip design
high level synthesis
hardware Trojan detection
hardware trojan
Hardware
design-for-trust techniques
design space exploration process
Design Space Exploration
datapath resource allocation
cuckoo search algorithm
Benchmark testing
