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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
adders
biblio
A High Speed Montgomery Multiplier Used in Security Applications
Submitted by grigby1 on Tue, 04/19/2022 - 10:46am
Montgomery multiplier
Table lookup
signal processing security
signal processing
Reverse carry propagate adder
Resiliency
resilience
pubcrawl
privacy
exponentiation
Metrics
Filtering
delays
data communication
cryptosystem
Cryptography
composability
adders
biblio
A Hardware Implementation of the SHA2 Hash Algorithms Using CMOS 28nm Technology
Submitted by aekwall on Mon, 03/29/2021 - 12:06pm
Hardware Implementation
SHA2 Hash algorithms
SHA-256
secure hash algorithm 2
hardware hash accelerator
CMOS 28nm technology
hash algorithms
Hash functions
adders
field programmable gate arrays
Compositionality
pubcrawl
CMOS technology
CMOS integrated circuits
Resiliency
Program processors
Hardware
Cryptography
biblio
Simulation of Modular Exponentiation Circuit for Shor's Algorithm in Qiskit
Submitted by aekwall on Mon, 03/22/2021 - 1:13pm
4-bit VBE quantum modular exponentiation circuit
x mod 15 circuit
step-by-step manner
Shor's Algorithm incorporating
RSA cryptosystems
quantum modular exponentiation circuit
quantum gates
Qiskit simulator
Qiskit
large-qubit quantum computer
integer factorization problem
example simulation
Ekert proposal
aforementioned circuit
Scalability
Quantum circuit
exponentiation
Qubit
adders
Registers
Integrated circuit modeling
Logic gates
quantum computing
public key cryptography
Computational modeling
pubcrawl
Resiliency
biblio
Adversarial multiple access channels and a new model of multimedia fingerprinting coding
Submitted by grigby1 on Tue, 02/23/2021 - 2:35pm
noise-like signals
linear combinations
malicious multiple access channels
Mathematical model
multi-access systems
Multimedia communication
multimedia computing
multimedia fingerprinting code
multiple access channel
network coding
Information systems
privacy
pubcrawl
Receivers
resilience
security
security of data
Watermarking
zero-error probability
broadcast channels
Metrics
Resiliency
composability
A-channel
adders
adversarial multiple access channels
arbitrary coefficients
binary adder channel
Binary codes
channel coding
collusion attack
compressed sensing
Conferences
digital fingerprint
digital fingerprinting code
digital fingerprinting coding problems
encoding
error statistics
biblio
Low-Overhead Robust RTL Signature for DSP Core Protection: New Paradigm for Smart CE Design
Submitted by aekwall on Mon, 11/09/2020 - 1:41pm
low-overhead robust RTL signature
FIR filters
IP piracy
flip-flops
covert signature embedding process
digital signal processor
DSP core protection
DSP-MP IP core
IP vendors
FIR filter
Multimedia Processor
nonsignature FIR RTL design
register-transfer level
reusable Intellectual Property cores
robust IP owner
secured smart CE device
smart CE design
smart Consumer Electronics devices
Registers
Hardware
Resiliency
pubcrawl
composability
policy-based governance
digital signatures
microprocessor chips
Multiplexing
IP networks
digital signal processing chips
Finite impulse response filters
adders
logic circuits
logic design
Latches
Consumer electronics
biblio
IC/IP Piracy Assessment of Reversible Logic
Submitted by aekwall on Mon, 11/09/2020 - 1:31pm
proper-size reversible functions
BDD
binary decision diagrams
embedded function
garbage outputs
IC-IP piracy assessment
IC/IP piracy
intellectual property piracy
Number of embeddings
ancillary inputs
QMDD
quantum multivalued decision diagrams
regular functions
Reversible logic
reversible logic circuits
reversible logic synthesis tools
IP piracy
IP networks
adiabatic computing
logic design
logic circuits
adders
Integrated circuit modeling
industrial property
Logic gates
quantum computing
Trojan horses
policy-based governance
composability
pubcrawl
Resiliency
embedded systems
security
biblio
Dynamic Adaptation of Approximate Bit-width for CNNs based on Quantitative Error Resilience
Submitted by grigby1 on Tue, 10/06/2020 - 1:40pm
dynamic adaptation
Resiliency
resilience
quantitative error resilience
pubcrawl
Power demand
power consumption
power aware computing
Neurons
logic circuits
Hardware
error resilience
dynamic adaptation of approximate bit-width
adders
convolutional neural networks
convolutional neural network
convolutional neural nets
convolution
configurable adder
Computing Theory
CNNs
approximation theory
approximate computing technology
approximate computing
approximate bit-width
biblio
Arithmetic Circuit Homomorphic Encryption and Multiprocessing Enhancements
Submitted by aekwall on Mon, 12/30/2019 - 12:36pm
Homomorphic encryption
TFHE library
OpenMP
multiprocessing enhancements
multiplication operation
MPI
latency reduction
Boolean Circuit
arithmetic operations
arithmetic circuit homomorphic encryption
Arithmetic Algorithm
arithmetic
adders
Informatics
Cloud Computing
multiprocessing systems
Registers
Human Factors
cloud services
Logic gates
Libraries
Metrics
pubcrawl
Resiliency
encryption
Cryptography
Scalability
biblio
Improving Power amp; Latency Metrics for Hardware Trojan Detection During High Level Synthesis
Submitted by grigby1 on Mon, 12/10/2018 - 11:42am
Mathematical model
work factor metrics
Unroll Factor
Trojan horses
third party IP cores
Space exploration
semiconductor industry
secure IC design process
Scalability
resource allocation
Resiliency
resilience
pubcrawl
power metrics
power consumption
microprocessor chips
adders
latency metrics
invasive software
integrated circuits
integrated circuit design
integrated chip design
high level synthesis
hardware Trojan detection
hardware trojan
Hardware
design-for-trust techniques
design space exploration process
Design Space Exploration
datapath resource allocation
cuckoo search algorithm
Benchmark testing
biblio
An assessment of vulnerability of hardware neural networks to dynamic voltage and temperature variations
Submitted by grigby1 on Thu, 06/07/2018 - 3:06pm
natural language processing
timing
temperature variations
Speech recognition
Resiliency
resilience
pubcrawl
problem solving
Neural Network Resilience
neural network algorithms
neural nets
adders
multilayer perceptrons
MLP
medical applications
Logic gates
learning (artificial intelligence)
hardware neural networks
Hardware
dynamic voltage
CNN
Biological neural networks
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