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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
65nm CMOS technology
biblio
A Machine Learning Attacks Resistant Two Stage Physical Unclonable Functions Design
Submitted by grigby1 on Mon, 06/10/2019 - 1:55pm
mirrors
Transistors
traditional approaches
stage physical unclonable functions design
security of data
security applications
security
Resiliency
resilience
Reliability
PUF
pubcrawl
privacy
physical unclonable function (PUF)
modelling attacks
32-bit current mirror
Mathematical model
machine learning attacks
machine learning
lightweight electronics
learning (artificial intelligence)
Hash functions
enhancing security
Current Mirror PUF
Cryptography
composability
CMOS integrated circuits
asynchronous circuits
Arbiter-PUF
65nm CMOS technology
