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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
ESL
biblio
Deep Packet Inspection Through Virtual Platforms using System-On-Chip FPGAs
Submitted by grigby1 on Fri, 07/03/2020 - 12:26pm
resilience
virtual platforms
virtual platform
transaction level modeling
TLM
time-varying systems
time-domain analysis
system-on-chip FPGA
system-on-chip
system on chip
Software
search engines
Scalability
Resiliency
computer architecture
pubcrawl
Mentor Vista
logic design
Inspection
hybrid CPU/FPGA
hardware-IP based architecture
hardware accelerators
Hardware
field programmable gate arrays
ESL
deep packet inspection
CPU-DMA based architecture
