| Title | A New Information Extractor for Profiled DPA and Implementation of High Order Masking Circuit |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Pan, Yuyang, Yin, Yanzhao, Zhao, Yulin, Wu, Liji, Zhang, Xiangmin |
| Conference Name | 2019 IEEE 13th International Conference on Anti-counterfeiting, Security, and Identification (ASID) |
| Date Published | oct |
| Keywords | CHES 2015, composability, Computer science, cryptography, data mining, ELV, explained local variance, extracting information, Hardware, high order masking, high order masking circuit, high order masking scheme, information retrieval, learning (artificial intelligence), machine learning method, Microelectronics Security, Microsoft Windows, new information extractor, Predictive Metrics, principal component analysis, profiled DPA, profiled stage, pubcrawl, Resiliency, security circuit implementation, side channel attack, space reduction, time reduction |
| Abstract | Profiled DPA is a new method combined with machine learning method in side channel attack which is put forward by Whitnall in CHES 2015.[1]The most important part lies in effectiveness of extracting information. This paper introduces a new rule Explained Local Variance (ELV) to extract information in profiled stage for profiled DPA. It attracts information effectively and shields noise to get better accuracy than the original rule. The ELV enables an attacker to use less power traces to get the same result as before. It also leads to 94.6% space reduction and 29.2% time reduction for calculation. For security circuit implementation, a high order masking scheme in modelsim is implemented. A new exchange network is put forward. 96.9% hardware resource is saved due to the usage of this network. |
| DOI | 10.1109/ICASID.2019.8924886 |
| Citation Key | pan_new_2019 |
A New Information Extractor for Profiled DPA and Implementation of High Order Masking Circuit