| Title | Multi-core Heterogeneous Video Processing System Design |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Zhang, Junjie, Sun, Tianfu |
| Conference Name | 2019 IEEE 13th International Conference on Anti-counterfeiting, Security, and Identification (ASID) |
| Keywords | field programmable gate arrays, hardware acceleration, image binarization, image processing speed, IP networks, Metrics, microprocessor chips, multi-core heterogeneous, multicore computing security, multicore heterogeneous acceleration processing, multicore heterogeneous computing technology, multicore heterogeneous video processing system design, multiprocessing systems, otsu adaptive binarization, Otsu binarized hardware-accelerated IP, pubcrawl, real-time video image processing system, Resiliency, Scalability, system-on-chip, video signal processing, Xilinx Zynq platform, Zynq |
| Abstract | In order to accelerate the image processing speed, in this paper, a multi-core heterogeneous computing technology based on the Xilinx Zynq platform is proposed. The proposed technique could accelerate the real-time video image processing system through hardware acceleration. In order to verify the proposed technique, an Otsu binarized hardware-accelerated IP is designed in FPGA and interacts with ARM through the AXI bus. Compared with the existing homogeneous architecture processor computing, the image processing speed of the proposed technique with multi-core heterogeneous acceleration processing is significantly accelerated. |
| DOI | 10.1109/ICASID.2019.8925178 |
| Citation Key | zhang_multi-core_2019 |
Multi-core Heterogeneous Video Processing System Design