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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
hardware acceleration
biblio
Magical-Decomposition: Winning Both Adversarial Robustness and Efficiency on Hardware
Submitted by grigby1 on Thu, 06/22/2023 - 1:43pm
Internet of Things
deep learning
machine learning
machine learning algorithms
Neural networks
pubcrawl
Human behavior
Metrics
hardware acceleration
composability
Robustness
Scalability
Adversarial training
decomposition
model compression
biblio
Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs
Submitted by grigby1 on Fri, 06/12/2020 - 12:09pm
high-quality hash functions
Resiliency
resilience
Registers
reconfigurable hash function
reconfigurable design
reconfigurable architectures
pubcrawl
network flow hashing
multiobjective linear genetic programming
Monitoring
Linear programming
IP networks
Compositionality
high speed computer networks
hash function design
hash algorithms
hardware acceleration
Hardware
genetic programming
genetic algorithms
FPGA
field programmable gate arrays
field programmable gate array
fast reconfigurable hash functions
Cryptography
biblio
Accelerated Approximate Nearest Neighbors Search Through Hierarchical Product Quantization
Submitted by grigby1 on Fri, 05/22/2020 - 2:27pm
multiple low-dimensional codebooks
Cartesian product
FPGA-tailored architecture
hardware acceleration
hierarchical PQ
Hierarchical product Quantization
High-Dimensional Indexing
HPQ
mathematics computing
approximate search
nearest neighbor search
Online Indexing
product quantization
query answering
Regression
Search Space
similarity search
vector quantization
nearest neighbour methods
machine learning
pubcrawl
field programmable gate arrays
Artificial Intelligence
pattern classification
neural nets
Metrics
Measurement
learning (artificial intelligence)
search problems
regression analysis
classification
query processing
information retrieval
accelerated Approximate Nearest Neighbors search
ANN search
biblio
Multi-core Heterogeneous Video Processing System Design
Submitted by aekwall on Mon, 02/10/2020 - 11:58am
image binarization
multicore computing security
Zynq
Xilinx Zynq platform
real-time video image processing system
Otsu binarized hardware-accelerated IP
otsu adaptive binarization
multicore heterogeneous video processing system design
multicore heterogeneous computing technology
multicore heterogeneous acceleration processing
multi-core heterogeneous
image processing speed
field programmable gate arrays
hardware acceleration
multiprocessing systems
microprocessor chips
video signal processing
Metrics
pubcrawl
Resiliency
system-on-chip
Scalability
IP networks
biblio
An Implementation and Experimental Evaluation of Hardware Accelerated Ciphers in All-Programmable SoCs
Submitted by grigby1 on Tue, 05/01/2018 - 11:22am
AES
FPGAs
hardware acceleration
IP cores
OpenSSL
biblio
An Implementation and Experimental Evaluation of Hardware Accelerated Ciphers in All-Programmable SoCs
Submitted by grigby1 on Mon, 04/30/2018 - 3:08pm
AES
FPGAs
hardware acceleration
IP cores
Metrics
OpenSSL
pubcrawl
Security Metrics
biblio
FPGA Based Hardware Acceleration of Sensor Matrix
Submitted by K_Hooper on Wed, 10/18/2017 - 10:15am
Activity Recognition
Compositionality
FPGA
hardware acceleration
high level synthesis
Human Factors
pubcrawl
sensing
Smart Grid Sensors
