Visible to the public A Multi-Channel 12 bit, 100Ksps 0.35um CMOS ADC IP core for Security SoC

TitleA Multi-Channel 12 bit, 100Ksps 0.35um CMOS ADC IP core for Security SoC
Publication TypeConference Paper
Year of Publication2020
AuthorsRagchaa, Byambajav, Wu, Liji, Zhang, Xiangmin, Chu, Honghao
Conference Name2020 IEEE 15th International Conference on Solid-State Integrated Circuit Technology (ICSICT)
Date PublishedNov. 2020
PublisherIEEE
ISBN Number978-1-7281-6235-5
KeywordsCapacitance, Capacitors, composability, control systems, IP networks, Metrics, Microelectronics, pubcrawl, resilience, Resiliency, security, Switches, Switching circuits
AbstractThis paper presents a multi-channel, 12 bit, ADC IP core with programmable gain amplifier which is implemented as part of novel Security SoC. The measurement results show that effective number of bits (ENOB) of the ADC IP core reaches 8 bits, SNDR of 47.14dB and SFDR of 56.55dB at 100Ksps sampling rate. The input voltage range is 0V to 3.3V, active die area of 700um*620um in 0.35um CMOS process, and the ADC consumes 22mW in all channel auto-scan mode at 3.3V power supply.
URLhttps://ieeexplore.ieee.org/document/9278390/
DOI10.1109/ICSICT49897.2020.9278390
Citation Keyragchaa_multi-channel_2020