Reverse engineering of integrated circuits (ICs) has become a major concern for semiconductor design companies since services to depackage, delayer and image an IC can be used to extract the underlying design. IP theft of this nature has not only economic impact due to IP theft, but also compromises the security of ICs used in military and critical infrastructure. The goal of this project is to gain a deeper understanding of the capabilities of an attacker who is trying to reverse engineer ICs that use current methods to camouflage their design, and develops stronger camouflaging techniques in light of these new attacks. This project explores foundational analysis of the security of logic obfuscation using camouflaging. The project develops a fundamental security metric for logic obfuscation, D-security, that measures the minimum number of input patterns an attacker needs to know to decamouflage a circuit. This research devises strong and effective decamouflaging attacks in order to understand the vulnerabilities in existing approaches, and new fortified IC camouflaging mechanisms that are resilient to these attacks. This work addresses the economic and security concerns result from IC reverse engineering, and will be integrated in graduate and undergraduate coursework at NYU as well as in the Embedded Systems Challenge (ESC) at NYU's annual cyber-security awareness week.
STARSS: Small: New Attack Vectors and Formal Security Analysis for Integrated Circuit Logic Obfuscation