| Title | Partial Reconfiguration for Run-time Memory Faults and Hardware Trojan Attacks Detection |
| Publication Type | Conference Paper |
| Year of Publication | 2022 |
| Authors | Li, Ying, Chen, Lan, Wang, Jian, Gong, Guanfei |
| Conference Name | 2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) |
| Date Published | jun |
| Keywords | compositionality, Costs, detection, fault, Hardware, Hardware Trojans, Memory, Memory management, Metrics, Prototypes, pubcrawl, Real-time Systems, resilience, Resiliency, Scalability, scalable verification, system-on-chip, Throughput |
| Abstract | Embedded memory are important components in system-on-chip, which may be crippled by aging and wear faults or Hardware Trojan attacks to compromise run-time security. The current built-in self-test and pre-silicon verification lack efficiency and flexibility to solve this problem. To this end, we address such vulnerabilities by proposing a run-time memory security detecting framework in this paper. The solution builds mainly upon a centralized security detection controller for partially reconfigurable inspection content, and a static memory wrapper to handle access conflicts and buffering testing cells. We show that a field programmable gate array prototype of the proposed framework can pursue 16 memory faults and 3 types Hardware Trojans detection with one reconfigurable partition, whereas saves 12.7% area and 2.9% power overhead compared to a static implementation. This architecture has more scalable capability with little impact on the memory accessing throughput of the original chip system in run-time detection. |
| DOI | 10.1109/HOST54066.2022.9840090 |
| Citation Key | li_partial_2022 |
Partial Reconfiguration for Run-time Memory Faults and Hardware Trojan Attacks Detection