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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
RLIS
biblio
Recovery-based resilient latency-insensitive systems
Submitted by BrandonB on Wed, 05/06/2015 - 2:53pm
logic circuits
Throughput
System performance
synchronous circuits
Synchronization
stalling signal
RLIS
Relays
recovery-based resilient latency-insensitive systems
queue sizing problem
clock cycle time
interconnect delay
Integrated circuit interconnections
improved queues
global stalling mechanism
expensive timing cost
error-recovery
error impact
Degradation
Clocks
