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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
FPGAs
biblio
C3APSULe: Cross-FPGA Covert-Channel Attacks through Power Supply Unit Leakage
Submitted by grigby1 on Wed, 02/10/2021 - 11:52am
potentially unintentional interactions
FPGA-to-FPGA
FPGAs
GPU-to-FPGA covert channels
hardware accelerators
highly-sensitive data
independent boards
Kintex 7 FPGA chips
local cloud FPGA
off-the-shelf Xilinx boards
per-user basis
potential countermeasures
FPGA security
Power Attacks
power supply unit leakage
Power supply units
receiving circuits
reconfigurable integrated circuits
Ring oscillators
sensing stressing ring oscillators
shared infrastructures
shared power supply units
sink FPGA
source FPGA
covert channels
pubcrawl
resilience
Resiliency
field programmable gate arrays
Hardware
Scalability
cloud environments
Compositionality
Voltage measurement
Transmitters
cryptographic keys
Cryptography
Field-Programmable Gate Arrays
Temperature measurement
Voltage control
Voltage regulators
APSULe
CPU-to-FPGA
cross-board leakage
cross-FPGA covert-channel attacks
data center infrastructure
different data center tenants
biblio
SACHa: Self-Attestation of Configurable Hardware
Submitted by aekwall on Mon, 08/17/2020 - 10:36am
hardware-software system
tamper-resistant hardware module
Software
self-attestation
SACHa
Resiliency
remote attacks
Read only memory
pubcrawl
Protocols
physical attacks
Microprocessors
intended application code
Human behavior
attestation
hardware-based attestation
Hardware
FPGAs
Field-Programmable Gate Arrays
field programmable gate arrays
embedded systems
embedded software
embedded device
device attestation
configurable hardware
configurable FPGA hardware
computer architecture
composability
biblio
A Protection and Pay-per-Use Licensing Scheme for On-Cloud FPGA Circuit IPs
Submitted by grigby1 on Mon, 01/27/2020 - 11:26am
cryptographic protocols and algorithms
FPGAs
hardware cloning and reverse engineering
Hardware IPs
Hardware Protection
Hardware Security
Human behavior
Human Factors
key management
Metrics
pubcrawl
resilience
Resiliency
Scalability
biblio
Return of the Runtimes: Rethinking the Language Runtime System for the Cloud 3.0 Era
Submitted by grigby1 on Mon, 12/10/2018 - 10:27am
return oriented programming
Serverless Computing
Resource Disaggregation
Platform-as-a-Service
Managed Language Runtime Systems
JIT Compilation
Garbage Collection
data centers
Cloud 3.0
FPGAs
Human Factors
composability
Scalability
Resiliency
Human behavior
pubcrawl
resilience
biblio
An Implementation and Experimental Evaluation of Hardware Accelerated Ciphers in All-Programmable SoCs
Submitted by grigby1 on Tue, 05/01/2018 - 10:22am
AES
FPGAs
hardware acceleration
IP cores
OpenSSL
biblio
An Implementation and Experimental Evaluation of Hardware Accelerated Ciphers in All-Programmable SoCs
Submitted by grigby1 on Mon, 04/30/2018 - 2:08pm
AES
FPGAs
hardware acceleration
IP cores
Metrics
OpenSSL
pubcrawl
Security Metrics
biblio
FPGA Implementation of Non-Uniform DFT for Accelerating Wireless Channel Simulations (Abstract Only)
Submitted by grigby1 on Mon, 03/19/2018 - 1:04pm
Acceleration
Analogical Transfer
analogies
FPGAs
high performance computation
high-level synthesis
Human behavior
Human Factors
NUDFT
pubcrawl
Transference
wireless channel simulation
biblio
Partially Reconfigurable IP Protection System with Ring Oscillator Based Physically Unclonable Functions
Submitted by grigby1 on Tue, 01/23/2018 - 2:21pm
key generation
Ring oscillators
Ring Oscillator
Resiliency
pubcrawl
proM
policy-based governance
Policy
physically unclonable functions
physical unclonable functions
partially reconfigurable IP protection system
Partial Reconfiguration
Oscillators
Labeling
key transfer problem
authentication
IP security solution
ip protection
intellectual properties
industrial property
Hardware Security
FPGAs
Field-Programmable Gate Arrays
field programmable gate arrays
encryption
electronics market
Cryptography
composability
collaboration
bitstream ciphering
biblio
AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs
Submitted by grigby1 on Fri, 08/18/2017 - 12:54pm
Authenticated Encryption (AE)
composability
efficient encryption
FPGAs
pubcrawl
Resiliency
Secure Reconfiguration
