Skip to Main Content Area
CPS-VO
Contact Support
Browse
Calendar
Announcements
Repositories
Groups
Search
Search for Content
Search for a Group
Search for People
Search for a Project
Tagcloud
› Go to login screen
Not a member?
Click here to register!
Forgot username or password?
Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
multiprocessor system-on-chip
biblio
A Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded Systems
Submitted by grigby1 on Mon, 03/29/2021 - 11:56am
Resiliency
MPSoC-based embedded systems
multiple processing cores
multiprocessing systems
multiprocessor system-on-chip
on-chip isolation
pubcrawl
real-time systems
resilience
model-based design
Safety
safety-critical embedded system
safety-critical software
security
security-critical embedded system
system-level isolation
system-on-chip
timing
dedicated access protection units
access permissions
access protection
access protection unit
authorisation
Code Generation
composability
configuration code
Data protection
abstract permission declarations
embedded systems
formal model
Hardware
heterogeneous system-on-chip platforms
information flow requirements
information flow tracking
internal communication links
Metrics
biblio
Efficient Timing Channel Protection for Hybrid (Packet/Circuit-Switched) Network-on-Chip
Submitted by grigby1 on Fri, 05/15/2020 - 12:29pm
Switching circuits
network transmission
network-on-chip
packet switching
packet switching NoC
packet-circuit-switched
security in NoC
Separate interface Hybrid
side-channel attacks
network routing
system security policy
TDM
Throughput
timing
timing channel
timing channel protection
timing characteristics
timing side channel
combined hybrid routers
network on chip security
Scalability
Resiliency
resilience
Metrics
channel attacks
circuit switching
circuit switching NoC
pubcrawl
conventional hybrid router
covert timing channel
hybrid network-on-chip
hybrid NoC
Integrated circuit modeling
MP-SoC
multiprocessing systems
multiprocessor system-on-chip
biblio
A security-aware routing implementation for dynamic data protection in zone-based MPSoC
Submitted by grigby1 on Mon, 06/11/2018 - 3:24pm
multiprocessing systems
network on chip security
Zones
security-aware routing
network-on-chip routing
network routing
multiprocessor system-on-chip
MPSoC
Encapsulation
asymmetrical security zones
Firewalls (computing)
Runtime
NoC
Routing protocols
Metrics
resilience
Routing
IP networks
Data protection
network-on-chip
Scalability
Resiliency
pubcrawl
security