Skip to Main Content Area
  • CPS-VO
    • Contact Support
  • Browse
    • Calendar
    • Announcements
    • Repositories
    • Groups
  • Search
    • Search for Content
    • Search for a Group
    • Search for People
    • Search for a Project
    • Tagcloud
      
 
Not a member?
Click here to register!
Forgot username or password?
 
Home
National Science Foundation

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

CPS-VO

system security policy

biblio

Visible to the public Efficient Timing Channel Protection for Hybrid (Packet/Circuit-Switched) Network-on-Chip

Submitted by grigby1 on Fri, 05/15/2020 - 12:29pm
  • Switching circuits
  • network transmission
  • network-on-chip
  • packet switching
  • packet switching NoC
  • packet-circuit-switched
  • security in NoC
  • Separate interface Hybrid
  • side-channel attacks
  • network routing
  • system security policy
  • TDM
  • Throughput
  • timing
  • timing channel
  • timing channel protection
  • timing characteristics
  • timing side channel
  • combined hybrid routers
  • network on chip security
  • Scalability
  • Resiliency
  • resilience
  • Metrics
  • channel attacks
  • circuit switching
  • circuit switching NoC
  • pubcrawl
  • conventional hybrid router
  • covert timing channel
  • hybrid network-on-chip
  • hybrid NoC
  • Integrated circuit modeling
  • MP-SoC
  • multiprocessing systems
  • multiprocessor system-on-chip

Terms of Use  |  ©2023. CPS-VO