Skip to Main Content Area
CPS-VO
Contact Support
Browse
Calendar
Announcements
Repositories
Groups
Search
Search for Content
Search for a Group
Search for People
Search for a Project
Tagcloud
› Go to login screen
Not a member?
Click here to register!
Forgot username or password?
Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
RT level Verilog specifications
biblio
Automated Synthesis of Differential Power Attack Resistant Integrated Circuits
Submitted by aekwall on Mon, 08/24/2020 - 11:41am
Dynamic Differential Logic
cryptographic processors
cryptographic systems
differential circuit design
differential logic
Differential Power Analysis
differential power analysis attacks
differential power attack resistant integrated circuits
DPA attack resistance
DPA resistant cell designs
combinational cells
fully automated synthesis system DPA resistant integrated circuits
MDPL
multiplying circuits
RT level Verilog specifications
secret key information
Secure Differential Multiplexer Logic
sequential cells
sequential circuits
power consumption
Resiliency
pubcrawl
composability
Cryptography
standards
tools
Libraries
Automated Response Actions
Logic gates
private key cryptography
Power demand
logic design
Hardware Security
Resistance
combinational circuits
Automated Synthesis
CMOS logic circuits
CMOS synthesis