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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
on-chip access
biblio
A Graph Theory Approach towards IJTAG Security via Controlled Scan Chain Isolation
Submitted by grigby1 on Mon, 11/02/2020 - 11:28am
Registers
IJTAG network
IJTAG security
Instruments
intellectual property security
isolation signals
microprocessor chips
on-chip access
on-chip instruments
policy-based governance
power consumption
pubcrawl
IJTAG
resilience
Resiliency
scan chain
security
security of data
system-on-chip
system-on-chip designs
third party intellectual property providers
unauthorized user access
untrusted sources
Diagnosis
Clocks
Complexity theory
composability
controlled scan chain isolation
data integrity
Data Integrity Attacks
data manipulation
data protection scheme
data sniffing
debug
design for test
authorisation
electronic design automation
embedded instruments
embedded systems
graph coloring problem
graph colouring
graph theory approach
hidden test-data registers
IEEE standards
IEEE Std 1687
IEEE Std. 1687
