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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
IEEE Std 1687
biblio
A Graph Theory Approach towards IJTAG Security via Controlled Scan Chain Isolation
Submitted by grigby1 on Mon, 11/02/2020 - 12:28pm
Registers
IJTAG network
IJTAG security
Instruments
intellectual property security
isolation signals
microprocessor chips
on-chip access
on-chip instruments
policy-based governance
power consumption
pubcrawl
IJTAG
resilience
Resiliency
scan chain
security
security of data
system-on-chip
system-on-chip designs
third party intellectual property providers
unauthorized user access
untrusted sources
Diagnosis
Clocks
Complexity theory
composability
controlled scan chain isolation
data integrity
Data Integrity Attacks
data manipulation
data protection scheme
data sniffing
debug
design for test
authorisation
electronic design automation
embedded instruments
embedded systems
graph coloring problem
graph colouring
graph theory approach
hidden test-data registers
IEEE standards
IEEE Std 1687
IEEE Std. 1687
biblio
On Integrating Lightweight Encryption in Reconfigurable Scan Networks
Submitted by aekwall on Mon, 01/20/2020 - 12:01pm
RSN
intellectual property
Lightweight Ciphers
lightweight stream cipher
logic testing
maintenance
malicious users
novel hardware
on-chip instrumentation
pubcrawl
PUF
reconfigurable scan networks
Resiliency
integrating lightweight encryption
Scalability
seamless integration
secret keys
Secure Wrapper
self-test
sensitive data
Software
software combined approach
system-on-chip
testing workflow
versatile software toolchain
flexible access
appropriate counter-measures
Ciphers
Cryptographic Protocols
Cryptography
data integrity
data privacy
debug modules
embedded instrumentation
embedded systems
encryption
field programmable gate arrays
-play instrument wrapper
FPGA-based implementation
Hardware
Hardware Security
IEEE standards
IEEE Std 1687
IEEE Std 1687 RSNs
IJTAG
industrial property
instrument wrapper
Instruments
integrated circuit testing
biblio
Trustworthy reconfigurable access to on-chip infrastructure
Submitted by grigby1 on Fri, 02/02/2018 - 1:29pm
security
reconfigurable scan network
reconfigurable scan networks
Registers
Resiliency
RSN
scan pattern generation method
secure DFT
secure pattern retargeting
pubcrawl
security problem
system-on-chip
trustworthiness
trustworthy access pattern generation
trustworthy access sequences
trustworthy data transmission
trustworthy reconfigurable access
Trustworthy Systems
IEEE Std 1500
composability
cyber physical systems
data communication
embedded systems
external interfaces
Hardware Security
IEEE standards
IEEE Std 1149
access mechanisms
IEEE Std 1687
IJTAG
Instruments
integrated circuit testing
JTAG
Latches
Multiplexing
on-chip embedded infrastructure
