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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
scan chain
biblio
A Graph Theory Approach towards IJTAG Security via Controlled Scan Chain Isolation
Submitted by grigby1 on Mon, 11/02/2020 - 12:28pm
Registers
IJTAG network
IJTAG security
Instruments
intellectual property security
isolation signals
microprocessor chips
on-chip access
on-chip instruments
policy-based governance
power consumption
pubcrawl
IJTAG
resilience
Resiliency
scan chain
security
security of data
system-on-chip
system-on-chip designs
third party intellectual property providers
unauthorized user access
untrusted sources
Diagnosis
Clocks
Complexity theory
composability
controlled scan chain isolation
data integrity
Data Integrity Attacks
data manipulation
data protection scheme
data sniffing
debug
design for test
authorisation
electronic design automation
embedded instruments
embedded systems
graph coloring problem
graph colouring
graph theory approach
hidden test-data registers
IEEE standards
IEEE Std 1687
IEEE Std. 1687
biblio
Is Robust Design-for-Security Robust Enough? Attack on Locked Circuits with Restricted Scan Chain Access
Submitted by aekwall on Tue, 09/08/2020 - 9:59am
locked circuits
Chained Attacks
working chip
unauthorized scan access
secret key recovery
scan chain
SAT attack
robust DFS technique
robust DFS design
robust design-for-security architecture
restricted scan chain access
logic locking security
logic locking attacks
Scalability
IP piracy
Boolean satisfiability based attack
benchmark circuits
ATPG
Boolean functions
logic circuits
computability
Security analysis
logic locking
pubcrawl
Resiliency
Cryptography
biblio
Scan chain based IP fingerprint and identification
Submitted by grigby1 on Mon, 06/11/2018 - 3:23pm
intellectual property
Silicon
security
scan chain
Scalability
Resiliency
resilience
pubcrawl
network on chip security
Metrics
ip protection
IP networks
IP identification
IP fingerprint
copy protection
integrated circuits
integrated circuit design
industrial property
identification technology
IC identification
fingerprinting techniques
Fingerprint recognition
fault coverage
fabrication
digital fingerprinting
digital fingerprint
delays
