A hardware intellectual property protection scheme based digital compression coding technology
| Title | A hardware intellectual property protection scheme based digital compression coding technology |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Xiao, Lijun, Huang, Weihong, Deng, Han, Xiao, Weidong |
| Conference Name | 2019 IEEE International Conference on Smart Cloud (SmartCloud) |
| Date Published | Dec. 2019 |
| Publisher | IEEE |
| ISBN Number | 978-1-7281-5506-7 |
| Keywords | composability, Compression coding, cryptography, data compression, decoding function, digital compression coding technology, Digital Watermark, embedding cost, encoding, field programmable gate arrays, FPGA, FPGA circuit, Hardware, hardware circuit, hardware intellectual property protection, image watermarking, industrial property, intellectual property, intellectual property security, IP core watermark, IP networks, ip protection, policy-based governance, pubcrawl, resilience, Resiliency, resource utilization, Robustness, security, surrounding circuit, Table lookup, watermark information, Watermarking |
| Abstract | This paper presents a scheme of intellectual property protection of hardware circuit based on digital compression coding technology. The aim is to solve the problem of high embedding cost and low resource utilization of IP watermarking. In this scheme, the watermark information is preprocessed by dynamic compression coding around the idle circuit of FPGA, and the free resources of the surrounding circuit are optimized that the IP watermark can get the best compression coding model while the extraction and detection of IP core watermark by activating the decoding function. The experimental results show that this method not only expands the capacity of watermark information, but also reduces the cost of watermark and improves the security and robustness of watermark algorithm. |
| URL | https://ieeexplore.ieee.org/document/9091420 |
| DOI | 10.1109/SmartCloud.2019.00023 |
| Citation Key | xiao_hardware_2019 |
- Resiliency
- intellectual property
- intellectual property security
- IP core watermark
- IP networks
- ip protection
- policy-based governance
- pubcrawl
- resilience
- industrial property
- resource utilization
- Robustness
- security
- surrounding circuit
- Table lookup
- watermark information
- Watermarking
- composability
- image watermarking
- hardware intellectual property protection
- hardware circuit
- Hardware
- FPGA circuit
- FPGA
- field programmable gate arrays
- encoding
- embedding cost
- Digital Watermark
- digital compression coding technology
- decoding function
- data compression
- Cryptography
- Compression coding