Biblio

As more and more information systems rely sen-sors for their critical decisions, there is a growing threat of injecting false signals to sensors in the analog domain. In particular, LightCommands showed that MEMS microphones are susceptible to light, through the photoacoustic and photoelectric effects, enabling an attacker to silently inject voice commands to smart speakers. Understanding such unexpected transduction mechanisms is essential for designing secure and reliable MEMS sensors. Is there any other transduction mechanism enabling laser-induced attacks? We positively answer the question by experimentally evaluating two commercial piezoresistive MEMS pressure sensors. By shining a laser light at the piezoresistors through an air hole on the sensor package, the pressure reading changes by ±1000 hPa with 0.5 mW laser power. This phenomenon can be explained by the photoelectric effect at the piezoresistors, which increases the number of carriers and decreases the resistance. We finally show that an attacker can induce the target signal at the sensor reading by shining an amplitude-modulated laser light.

Expanding techniques for chip-scale acoustic wave focusing would open doors for advancements in signal processing and quantum electromechanical microsystems. In this paper, we present a method for acoustic wave focusing and wavefront shaping at radio frequencies (RF), validated with thin-film lithium niobite on a low-loss and high coupling silicon carbide (LiNbO3-on-SiC) testbed. By depositing a metal layer, we can mitigate the piezoelectric stiffening effect, and reduce the acoustic wave speed in a patterned area. Employing a design analogous to geometric optical systems, efficient acoustic wave focusing is experimentally observed. With more development, this technique could be employed in emerging acoustic microsystems.

Cyber-Physical Power Systems (CPPSs) currently face an increasing number of security attacks and lack methods for optimal proactive security decisions to defend the attacks. This paper proposed an optimal defensive method based on game theory to minimize the system performance deterioration of CPPSs under cyberspace attacks. The reinforcement learning algorithmic solution is used to obtain the Nash equilibrium and a set of metrics of system vulnerabilities are adopted to quantify the cost of defense against cyber-attacks. The minimax-Q algorithm is utilized to obtain the optimal defense strategy without the availability of the attacker's information. The proposed solution is assessed through experiments based on a realistic power generation microsystem testbed and the numerical results confirmed its effectiveness.

This work demonstrates an ultra-compact low power oscillating micromechanical active pixel array based on a 0.35 μm back-end of line (BEOL)-embedded CMOS-MEMS technology. Each pixel consists of a 3-MHz clamped-clamped beam (CCB) MEMS resonator and a power scalable transimpedance amplifier (TIA) that occupies a small area of 70 × 60 μm2 and draws only 85 μW/pixel. The MEMS resonator is placed next to the TIA with less than 10 μm spacing thanks to the well-defined etch stops in the titanium nitride composite (TiN-C) CMOS-MEMS platform. A multiplexing phase-locked loop (PLL)-driven oscillator is employed to demonstrate the chip functionality. In particular, a nonlinear operation of the resonator tank is used to optimize the phase noise (PN) performance and Allan deviation (ADEV) behavior. The ADEV of 420 ppb averaged over best 3-pixels is exhibited based on such a nonlinear vibration operation.

This paper presents a method optimizing the thrust force of a Micro Electro Mechanical System (MEMS) Permanent Magnet Linear Motor, based on harmonic current injection. Fourier decomposition is implemented to the air gap flux density of the motor to derive the fitting expression of the thrust force dependent to exciting current. Through analyzing the thrust force ripple of sinusoidal current excitement, the paper comes up with the strategy of harmonic current injection to eliminate the ripple component in the thrust force waveform. Mathematical demonstration is given that injecting harmonic current can totally eliminate the ripple caused by odd component of vertical air gap magnetic induction intensity. Simulation verification is implemented based on the 3rd and 7th harmonic injection control strategy, proving that the method is feasible for the thrust ripple is reduced to 4.3% of the value before optimazation. Experimental results lead to the consistent conclusion that the strategy shows good steady-state and dynamic performance.

The traditional reactive web caching system is getting less popular day by day due to its inefficiency in handling the overwhelming requests for multimedia content. An intelligent web caching system intends to take optimal cache decisions by predicting future popular contents (FPC) proactively. In recent years, a few approaches have proposed some intelligent caching system where they were concerned about proactive caching. Those works intensified the importance of FPC prediction using the prediction models. However, only FPC prediction may not help to get the optimal solution in every scenario. In this paper, a technique named IntellCache has been proposed that increases the caching efficiency by taking a cache decision i.e. content storing decision before storing the predicted FPC. Different deep learning models such as- multilayer perceptron (MLP), Long short-term memory (LSTM) of Recurrent Neural Network (RNN) and ConvLSTM a combination of LSTM and Convolutional Neural Network (CNN) are compared to identify the most efficient model for FPC. The information on the contents of 18 years from the MovieLens data repository has been mined to evaluate the proposed approach. Results show that this proposed scheme outperforms previous solutions by achieving a higher cache hit ratio and lower average delay and thus, ensures users' satisfaction.

This work reviews various methods which improve the effective coupling coefficient ( k2eff) of non-bulk acoustic wave (BAW) aluminum nitride (AlN) based RF MEMS resonators, mainly focusing on the innovative structural design of the resonators. k2eff is the key parameter for a resonator in communication applications because it measures the achievable fractional bandwidth of the filter constructed. The resonator's configuration, dimension, material stack and the fabrication process will all have impact on its k2eff. In this paper, the authors will review the efforts in improving the k2eff of piezoelectric MEMS resonators from research community in the past 15 years, mainly from the following three approaches: coupling lateral wave with vertical wave, exciting two-dimensional (2-D) lateral wave, as well as coupling 2-D lateral wave with vertical wave. The material will be limited to AlN family, which is proven to be manageable for manufacturing. The authors will also try to make recommendations to the effectiveness of various approaches and the path forward.

This paper is the first to investigate the long-term stability of Surface Acoustic Wave Gyroscopes (SAWG) using an ovenized control system. Monolithic integration of a MEMS heater adjacent to SAW devices on Lithium Niobate over insulator substrate (LNOI) tightly couples frequency-based temperature detection with heating for temperature and frequency stabilization. This first prototype demonstrates the ability to minimize the temperature variations of the SAWG to below ±10 μK and stabilize the SAWG resonance frequency to ±0.2 ppm. This approach thus eliminates the thermal drift in a SAWG and enables the development of a new generation of MEMS-based gyroscopes with long-term stability.

Back-end-of-line compatible integration of NdFeB-based micro magnets onto 8 inch Si substrates is presented. Substrate conditioning procedures to enable further processing in a cleanroom environment are discussed. It is shown that permanent magnetic structures with lateral dimensions between 25μm and 2000μm and a depth up to 500μm can be fabricated reliably and reproducibly with a remanent magnetization of 340mT at a standard deviation as low as 5% over the substrate. To illustrate post-processing capabilities, the fabrication of micro magnet arrangements embedded in silicon frames is described.

This paper presents a new class of high-performance permanent micro-magnets based on the controlled assembly of cobalt nanorods for the electromagnetic transduction of MEMS. Micromagnets are fabricated using a low temperature fabrication process that yields a dense material exhibiting high coercive field and remanence to saturation magnetization ratio. The cartography of the magnetic induction produced by the sub-millimeter size magnets was obtained using a scanning Hall effect micro-probe microscope. Silicon microcantilevers placed in the vicinity of these magnets were successfully actuated using the Lorentz force with low currents. The good signal to noise ratio measured at resonance demonstrates the potentiality of these nanostructured micro-magnets.

As data security has become the major concern in modern storage systems with low-cost multi-level-cell (MLC) flash memories, it is not trivial to realize data sanitization in such a system. Even though some existing works employ the encryption or the built-in erase to achieve this requirement, they still suffer the risk of being deciphered or the issue of performance degradation. In contrast to the existing work, a fast sanitization scheme is proposed to provide the highest degree of security for data sanitization; that is, every old version of data could be immediately sanitized with zero live-data-copy overhead once the new version of data is created/written. In particular, this scheme further considers the reliability issue of MLC flash memories; the proposed scheme includes a one-shot sanitization design to minimize the disturbance during data sanitization. The feasibility and the capability of the proposed scheme were evaluated through extensive experiments based on real flash chips. The results demonstrate that this scheme can achieve the data sanitization with zero live-data-copy, where performance overhead is less than 1%.

Correct compilers perform program transformations preserving input/output behaviours of programs. Yet, correctness does not prevent program optimisations from introducing information-flow leaks that would make the target program more vulnerable to side-channel attacks than the source program. To tackle this problem, we propose a notion of Information-Flow Preserving (IFP) program transformation which ensures that a target program is no more vulnerable to passive side-channel attacks than a source program. To protect against a wide range of attacks, we model an attacker who is granted arbitrary memory accesses for a pre-defined set of observation points. We propose a compositional proof principle for proving that a transformation is IFP. Using this principle, we show how a translation validation technique can be used to automatically verify and even close information-flow leaks introduced by standard compiler passes such as dead-store elimination and register allocation. The technique has been experimentally validated on the CompCert C compiler.

State-of-the-art convolutional neural networks (ConvNets) are now able to achieve near human performance on a wide range of classification tasks. Unfortunately, current hardware implementations of ConvNets are memory power intensive, prohibiting deployment in low-power embedded systems and IoE platforms. One method of reducing memory power is to exploit the error resilience of ConvNets and accept bit errors under reduced supply voltages. In this paper, we extensively study the effectiveness of this idea and show that further savings are possible by injecting bit errors during ConvNet training. Measurements on an 8KB SRAM in 28nm UTBB FD-SOI CMOS demonstrate supply voltage reduction of 310mV, which results in up to 5.4× leakage power reduction and up to 2.9× memory access power reduction at 99% of floating-point classification accuracy, with no additional hardware cost. To our knowledge, this is the first silicon-validated study on the effect of bit errors in ConvNets.