Secure Memory for Embedded Tamper-Proof Systems
Title | Secure Memory for Embedded Tamper-Proof Systems |
Publication Type | Conference Paper |
Year of Publication | 2019 |
Authors | Serpanos, Dimitrios, Stachoulis, Dimitrios |
Conference Name | 2019 14th International Conference on Design Technology of Integrated Systems In Nanoscale Era (DTIS) |
Date Published | apr |
ISBN Number | 978-1-7281-3424-6 |
Keywords | Aerospace electronics, change memory contents, composability, cryptography, data change scenaria, data protection, Embedded systems, embedded tamper-proof systems, Human Behavior, human factors, Integrated circuit modeling, integrated circuits, memory cell circuitry, memory data change, memory data leakage protection, memory instability, Memory management, memory supply voltage manipulation, metastability, Metrics, protection circuitry, pubcrawl, Resiliency, Scalability, secure memory, security of data, storage management, Tamper resistance, tamper-proof embedded systems, tamper-proof system, Tamper-Resistance, Trusted Component, Voltage measurement |
Abstract | Data leakage and disclosure to attackers is a significant problem in embedded systems, considering the ability of attackers to get physical access to the systems. We present methods to protect memory data leakage in tamper-proof embedded systems. We present methods that exploit memory supply voltage manipulation to change the memory contents, leading to an operational and reusable memory or to destroy memory cell circuitry. For the case of memory data change, we present scenaria for data change to a known state and to a random state. The data change scenaria are effective against attackers who cannot detect the existence of the protection circuitry; furthermore, original data can be calculated in the case of data change to a known state, if the attacker identifies the protection circuitry and its operation. The methods that change memory contents to a random state or destroy memory cell circuitry lead to irreversible loss of the original data. However, since the known state can be used to calculate the original data. |
URL | https://ieeexplore.ieee.org/document/8735073 |
DOI | 10.1109/DTIS.2019.8735073 |
Citation Key | serpanos_secure_2019 |
- security of data
- memory supply voltage manipulation
- metastability
- Metrics
- protection circuitry
- pubcrawl
- Resiliency
- Scalability
- secure memory
- Memory management
- storage management
- Tamper resistance
- tamper-proof embedded systems
- tamper-proof system
- Tamper-Resistance
- Trusted Component
- Voltage measurement
- Aerospace electronics
- memory instability
- memory data leakage protection
- memory data change
- memory cell circuitry
- integrated circuits
- Integrated circuit modeling
- Human Factors
- Human behavior
- embedded tamper-proof systems
- embedded systems
- Data protection
- data change scenaria
- Cryptography
- composability
- change memory contents