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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Hardware Security
biblio
FPGA-oriented moving target defense against security threats from malicious FPGA tools
Submitted by aekwall on Mon, 09/09/2019 - 9:48am
FOMTD
Predictive Metrics
Xilinx
target defense
reverse engineering
moving target defense principle
malicious FPGA tools
hardware trojan
FPGA-oriented MTD method
FPGA users
FPGA security
FPGA hardware-software providers
FPGA emulation results
FPGA design suite
FPGA configuration
security of data
defense lines
moving target defense
Benchmark testing
Scalability
Hardware Security
security threats
Trojan horses
pubcrawl
Resiliency
Table lookup
security
Hardware
FPGA
field programmable gate arrays
biblio
HyperFlow: A Processor Architecture for Nonmalleable, Timing-Safe Information Flow Security
Submitted by grigby1 on Thu, 09/05/2019 - 10:27am
composability
Control Theory
Hardware Security
information-flow security
pubcrawl
resilience
Resiliency
security
timing channels
biblio
Solving Internet's Weak Link for Blockchain and IoT Applications
Submitted by aekwall on Mon, 08/26/2019 - 9:07am
Internet of Things
authentication
blockchain
Cryptography
Decentralized Security
Digital signing
encryption
Hardware Security
Human behavior
security weaknesses
IoT
Key storage
Metrics
policy-based governance
Private keys
pubcrawl
resilience
SECP256K1
biblio
A Unifying Logic Encryption Security Metric
Submitted by aekwall on Mon, 07/01/2019 - 9:14am
obfuscation
logic encryption
Security Metrics
Hardware Security
Metrics
pubcrawl
biblio
Property Specific Information Flow Analysis for Hardware Security Verification
Submitted by grigby1 on Mon, 05/20/2019 - 3:30pm
Scalability
Metrics
policy-based governance
potential security violations
property specific information flow analysis
property specific search
property specific trimming technique
pubcrawl
resilience
Resiliency
Mathematical model
security
security critical paths
security model
security of data
security property
security verification
timing
Trojan horses
unintended design flaws
hardware security verification
collaboration
Complexity theory
composability
Control Theory
Design methodology
formal verification
Hardware
hardware information flow analysis
Hardware Security
Acceleration
hardware security vulnerabilities
Hardware Trojans
Human behavior
Human Factors
information flow analysis
information flow models
information flow security
information theoretic security
biblio
A Dynamic-Key Secure Scan Structure Against Scan-Based Side Channel and Memory Cold Boot Attacks
Submitted by grigby1 on Fri, 04/05/2019 - 9:29am
memory attack
Side-channel attack
side channel attack
security level
security
secure scan architecture
scan design key generator
Scalability
Resiliency
resilience
Random access memory
pubcrawl
memory cold boot attack
memory attacks
Chained Attacks
integrated circuit testing
Hardware Security
Generators
flip-flops
dynamic-key secure scan structure
dynamic-key secure DFT structure
dynamic key generation
Discrete Fourier transforms
design for testability
design for test technology
Cryptography
Controllability
Clocks
biblio
SOTERIA: Exploiting Process Variations to Enhance Hardware Security with Photonic NoC Architectures
Submitted by aekwall on Mon, 03/25/2019 - 8:57am
Resiliency
pubcrawl
composability
Metrics
Process Variations
Hardware Security
photonic NoCs
signal processing security
biblio
A Co-Training Based Hardware Trojan Detection Technique by Exploiting Unlabeled ICs and Inaccurate Simulation Models
Submitted by grigby1 on Fri, 03/15/2019 - 10:59am
Integrated circuit modeling
unlabeled ICs
unlabeled IC
unlabeled fabricated IC
Trojan horses
trojan horse detection
Training
simulated IC
Silicon
reliable detection capability
pubcrawl
pattern classification
learning (artificial intelligence)
invasive software
accurate classification model
inaccurate simulation models
IC labeling
hardware Trojan detection
Hardware Security
Hardware
golden chip
fabrication
fabricated golden chips
co-training based hardware Trojan detection technique
co-training
classification-based golden chips-free hardware Trojan detection technique
Classification algorithms
actual silicon fabrication
biblio
Building Trusted Golden Models-Free Hardware Trojan Detection Framework Against Untrustworthy Testing Parties Using a Novel Clustering Ensemble Technique
Submitted by grigby1 on Fri, 03/15/2019 - 10:59am
novel clustering ensemble method
untrustworthy testing party
untrustworthy testing parties
Unsupervised Learning
trusted hardware Trojan detection framework
Trusted Computing
Trojan horses
trojan horse detection
testing stage
testing
robust hardware Trojan detection framework
pubcrawl
pattern clustering
novel clustering ensemble technique
Clustering algorithms
invasive software
integrated circuit testing
Integrated circuit modeling
IC
hardware Trojan detection
Hardware Security
Hardware
golden models-free hardware Trojan detection framework
fabrication process
fabrication
existing hardware Trojan detection
clustering ensemble
biblio
Secure Scan Architecture Using Clock and Data Recovery Technique
Submitted by grigby1 on Thu, 02/14/2019 - 10:22am
fault coverage
Voltage control
System recovery
security threats
security of data
secure scan architecture
Scan Architecture
Resiliency
resilience
pubcrawl
Observability
Hardware Security
fault diagnosis
authentication
encoding
DLL
DfT technique
DfT
design for testability
delays
Controllability
computer architecture
Clocks
clock-data recovery technique
CDR
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