Hardware Security

biblio

Securing a Wireless Network-on-Chip Against Jamming Based Denial-of-Service Attacks

Submitted by aekwall on Mon, 05/11/2020 - 10:09am

persistent jamming attack
internal hardware Trojans
jamming attack
low-power transceivers
ML classifiers
network-on-chip communications
NoC switches
nonscalable multihop data transmission paths
On chip interconnect
On chip security
on-chip data transfer
on-chip wireless medium
denial-of-service attacks
radio transceivers
radiofrequency interconnections
random burst error correction code
Switches
switching networks
WiNoC security
wired NoC architectures
wireless interconnection
Wireless NoC
wireless NoC architectures
network on chip security
system-on-chip
telecommunication security
learning (artificial intelligence)
Resiliency
pubcrawl
wireless sensor networks
Wireless communication
Metrics
machine learning
telecommunication network routing
telecommunication computing
radio networks
Scalability
DoS
Hardware Security
error correction codes
radiofrequency interference
DoS attack
Jamming
denial-of-service attack
machine learning classifier
HT
network-on-chip
data transfer security threats

biblio

Security Network On-Chip for Mitigating Side-Channel Attacks

Submitted by aekwall on Mon, 05/11/2020 - 10:08am

multiple countermeasures
compromised device
contemporary hardware threats
design complexity
electromagnetic analysis attacks
electromagnetic interference
hardware security threats
high-confidence security network on-chip
individual threats
machine learning security IC
malicious physical interference
modern ICs
attack-specific countermeasures
on-chip distribution networks
On-chip power delivery
on-chip voltage variations
operating device-under-attack
robust confidence security network on-chip
security networks
Side-channel attack
side-channel attack mitigation
strict performance requirements
trained ML ICs
network on chip security
timing
Scalability
learning (artificial intelligence)
Resiliency
pubcrawl
Metrics
machine learning
physical interaction
system-on-chip
system security
sensors
Attack detection
security of data
Hardware Security
side-channel attacks
integrated circuit design
data analysis
malicious activity
integrated circuits
network-on-chip
active attack
advance invasive attacks
advance noninvasive attacks
advanced technology nodes

biblio

A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms

Submitted by grigby1 on Fri, 04/03/2020 - 11:56am

provable security
structural corruption
SAT attack
paradigm shift
modern logic encryption algorithms
low-cost countermeasures
logic encryption techniques
logic encryption
intellectual property piracy
integrated circuit supply chain
Hardware Trojans
computability
Boolean satisfiability attack
resilience
Logic gates
Compositionality
Metrics
invasive software
Computer crime
integrated circuits
industrial property
Hardware Security
Hardware
Resiliency
pubcrawl
encryption
Cryptography

biblio

Statistical Power Analysis for IoT Device Oriented Encryption with Glitch Canceller

Submitted by grigby1 on Mon, 03/02/2020 - 12:33pm

Low-Power
Tamper resistance
statistical power analysis
statistical analysis
Side-channel attack
Scalability
pubcrawl
privacy
PRINCE
power consumption
Metrics
lowest latency cryptography
Big Data
IoT devise
IoT device oriented encryption
Internet of Things
Human Factors
Human behavior
Hardware Security
glitch canceller
field-programmable gate array
field programmable gate arrays
Cryptography

biblio

Countermeasure of Lightweight Physical Unclonable Function Against Side-Channel Attack

Submitted by grigby1 on Mon, 03/02/2020 - 12:32pm

message authentication
Training data
Tamper resistance
side-channel information
Side-channel attack
security of IoT
Scalability
pubcrawl
Power measurement
Power demand
power consumption
power aware computing
Physical Unclonable Function
modeling attack
Metrics
authentication
lightweight PUF
lightweight physical unclonable function
Internet of Things
internet
Integrated circuit modeling
Industrial Internet of Things
Human Factors
Human behavior
Hardware Security
field programmable gate arrays
external Internet
Cryptography
countermeasure method

biblio

Enabling Ubiquitous Hardware Security via Energy-Efficient Primitives and Systems : (Invited Paper)

Submitted by aekwall on Mon, 03/02/2020 - 11:30am

Hardware Security
Ubiquitous Computing Security
ubiquitous hardware security
Thermal stability
security-sensitive applications
random number generators
pufs
power penalty
low-end devices
Low power
HW security
energy-efficient primitives
ubiquitous computing
error correction codes
security
Human Factors
Random access memory
Entropy
attacks
design requirements
Metrics
pubcrawl
Resiliency
power aware computing
attack surface
Hardware
Cryptography
Scalability

biblio

Increasing the SAT Attack Resiliency of In-Cone Logic Locking

Submitted by grigby1 on Wed, 02/26/2020 - 3:48pm

Logic gates
security
satisfiability attack
SAT attack resiliency
SAT attack
Resiliency
resilience
removal attack
pubcrawl
MFFC based algorithm
maximum fanout free cones
manufacturing
logic locking
provable security
logic design
key gate selection
Iterative methods
integrated logic circuits
integrated circuits
in-cone techniques
in-cone logic locking
Hardware Security
Hardware
Electronics packaging
circuit netlist

biblio

Restricting Switching Activity Using Logic Locking to Improve Power Analysis-Based Trojan Detection

Submitted by grigby1 on Wed, 02/26/2020 - 3:38pm

pubcrawl
logic locking method
malicious circuits
million-gate circuits
outsourcing
PCA-based HT detection methods
power analysis-based Trojan detection
power consumption
power consumption analysis
Power demand
principal component analysis
Process Variations
logic locking
resilience
security
semiconductor companies
small sub-circuit collection
supply chain security
Switches
system-on-chip
trojan horse detection
Trojan horses
untrustworthy fabs
hardware Trojan detection
policy-based governance
composability
IP piracy
circuit block extraction
circuit power
cyber physical systems
design for hardware trust
fabrication foundries
gate level
Hardware
Hardware Security
Resiliency
hardware Trojan threat
HT activity
HT power
HT-infected circuits
industrial property
integrated circuit layout
intellectual properties
invasive software
IPS
Logic gates

biblio

LAOCOÖN: A Run-Time Monitoring and Verification Approach for Hardware Trojan Detection

Submitted by grigby1 on Wed, 02/26/2020 - 3:38pm

LAOCOON
verification rules
Trojan horses
trojan horse detection
temporal properties
supply chain security
sensitive information
security
Safety
run-time verification
run-time monitoring
Resiliency
resilience
pubcrawl
Monitoring
malicious inclusions
active fault attacks
invasive software
Integrated circuit modeling
hardware Trojan horses
hardware Trojan detection
Hardware Security
Hardware
generic attackers
formal verification techniques
formal verification
Fault Attacks
electronic systems
dedicated monitoring circuits
cyber physical systems
Circuit faults
automata

biblio

A Novel Security Assessment Method Based on Linear Regression for Logic Locking

Submitted by aekwall on Mon, 02/10/2020 - 10:42am

logic locking
security assessment
Resiliency
pubcrawl
probability
Predictive Metrics
multiple linear regression
Microelectronics Security
logic locking security assessment method
composability
linear regression
key-inputs modeling
Hardware Security
encrypted key-inputs
encrypted combinational benchmark circuits
encrypted circuit
distribution probabilities
Cryptography

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Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

Hardware Security

Securing a Wireless Network-on-Chip Against Jamming Based Denial-of-Service Attacks

Security Network On-Chip for Mitigating Side-Channel Attacks

A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms

Statistical Power Analysis for IoT Device Oriented Encryption with Glitch Canceller

Countermeasure of Lightweight Physical Unclonable Function Against Side-Channel Attack

Enabling Ubiquitous Hardware Security via Energy-Efficient Primitives and Systems : (Invited Paper)

Increasing the SAT Attack Resiliency of In-Cone Logic Locking

Restricting Switching Activity Using Logic Locking to Improve Power Analysis-Based Trojan Detection

LAOCOÖN: A Run-Time Monitoring and Verification Approach for Hardware Trojan Detection

A Novel Security Assessment Method Based on Linear Regression for Logic Locking