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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Hardware Security
biblio
IP Protection and Supply Chain Security through Logic Obfuscation: A Systematic Overview
Submitted by grigby1 on Mon, 01/27/2020 - 11:34am
collaboration
composability
Hardware Security
Human behavior
Human Factors
IC camouflaging
logic locking
logic obfuscation
Metrics
policy-based governance
pubcrawl
resilience
Resiliency
Scalability
supply chain risk assessment
biblio
A Protection and Pay-per-Use Licensing Scheme for On-Cloud FPGA Circuit IPs
Submitted by grigby1 on Mon, 01/27/2020 - 11:26am
cryptographic protocols and algorithms
FPGAs
hardware cloning and reverse engineering
Hardware IPs
Hardware Protection
Hardware Security
Human behavior
Human Factors
key management
Metrics
pubcrawl
resilience
Resiliency
Scalability
biblio
On Integrating Lightweight Encryption in Reconfigurable Scan Networks
Submitted by aekwall on Mon, 01/20/2020 - 11:01am
RSN
intellectual property
Lightweight Ciphers
lightweight stream cipher
logic testing
maintenance
malicious users
novel hardware
on-chip instrumentation
pubcrawl
PUF
reconfigurable scan networks
Resiliency
integrating lightweight encryption
Scalability
seamless integration
secret keys
Secure Wrapper
self-test
sensitive data
Software
software combined approach
system-on-chip
testing workflow
versatile software toolchain
flexible access
appropriate counter-measures
Ciphers
Cryptographic Protocols
Cryptography
data integrity
data privacy
debug modules
embedded instrumentation
embedded systems
encryption
field programmable gate arrays
-play instrument wrapper
FPGA-based implementation
Hardware
Hardware Security
IEEE standards
IEEE Std 1687
IEEE Std 1687 RSNs
IJTAG
industrial property
instrument wrapper
Instruments
integrated circuit testing
file
Simulation-Based Analysis of EM Side Channels in Embedded Systems From Software to Fields
Submitted by Michael Orshansky on Wed, 01/08/2020 - 1:10pm. Contributors:
Michael Orshansky
Andreas Gerstlauer
Ali Yilmaz
Project Slides
Hardware Security
Design Systems
1901446
SaTC PI Meeting 2019
file
Domain Informed Techniques for Detecting and Defending Against Malicious Firmware
Submitted by Kevin Butler on Tue, 01/07/2020 - 10:46am. Contributor:
Kevin Butler
Project Slides
Hardware Security
Architecture Systems
1815883
SaTC PI Meeting 2019
biblio
SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware
Submitted by grigby1 on Mon, 12/30/2019 - 1:17pm
circuit obfuscation
cyclic encryption
exponentiation
Hardware Security
pubcrawl
Resiliency
Scalability
biblio
Area Constraint Aware Physical Unclonable Function for Intelligence Module
Submitted by grigby1 on Mon, 12/09/2019 - 1:01pm
Hardware
Table lookup
security of IoT device
security countermeasures
PUF performance evaluation
pubcrawl
physical unclonable functions
Physical Unclonable Function
NN
Neurons
neural network
IoT devices
intelligence module
Hardware Security
area constraint aware physical unclonable function
Hamming distance
field programmable gate arrays
edge computing
Cryptography
computational intelligence
Compositionality
composability
circuit area
authentication techniques
authentication
Artificial Neural Networks
artificial intelligence technology
area constraint aware PUF
biblio
Semantics-Directed Prototyping of Hardware Runtime Monitors
Submitted by grigby1 on Mon, 11/04/2019 - 11:35am
ROP-style code reuse attacks
Monitoring
multiple memory accesses
pubcrawl
rapid-prototyping runtime monitors
reconfigurable architectures
resilience
Resiliency
rop attacks
Model driven development
Runtime
Scalability
security of data
Semantics
semantics-directed prototyping
software monitor
software-based attacks
Biomedical monitoring
Instruction sets
Human Factors
Human behavior
high level synthesis
hardware-based protection
Hardware Security
hardware runtime monitors
hardware monitor
Hardware
formal verification
embedded systems
embedded processor
embedded hardware
composability
building memory protection mechanisms
biblio
Hardware Implementation of Dynamic Key Value Based Stream Cipher Using Chaotic Logistic Map
Submitted by grigby1 on Tue, 10/08/2019 - 3:44pm
Random sequences
NIST statistical
nonrecursive key
private key cryptography
PRNG
pseudorandom number generation
pseudorandom sequence generation
pubcrawl
public key cryptography
random key generation
random number generation
Metrics
randomness tests
resilience
Resiliency
Scalability
stream cipher
symmetric key chaos based cryptography
Thermal analysis
Verilog HDL
X-power
Xilinx device
FPGA device
binary sequence
binary sequences
chaos
Chaos based cryptography
chaotic logistic map
Ciphers
dynamic key value based stream cipher
embedded systems
field programmable gate arrays
Field programmable gated array
asymmetric key chaos based cryptography
frequency 62.2 MHz
Hardware
Hardware Security
hardware-based embedded system
Human behavior
key scheduling
key stream
logistic map
Logistics
biblio
Repurposing SoC Analog Circuitry for Additional COTS Hardware Security
Submitted by grigby1 on Wed, 09/11/2019 - 1:44pm
repurposing SoC analog circuitry
Microelectronics Security
on-chip analog blocks
on-chip analog hardware blocks
physically unclonable function responses
processing algorithms
pubcrawl
PUF responses
reliable key generation
microcontrollers
resilience
Resiliency
security
Semiconductor device measurement
system-on-chip
temperature fluctuations
Temperature measurement
trusted microelectronics
Cryptography
additional COTS hardware security
analog to digital converters
analogue-digital conversion
commercial off-the-shelf system-on-a-chip integrated circuits
common COTS microcontroller
comparators
composability
COTS security
ADC
DAC
device authentication activities
digital to analog converters
digital-analogue conversion
encryption
Hardware
Hardware Security
Metrics
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