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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Hardware
biblio
BIOS integrity an advanced persistent threat
Submitted by BrandonB on Wed, 05/06/2015 - 1:56pm
information security spectrum
Vectors
Trusted Computing
Stuxnet
Servers
security
Roots of Trust (RoTs)
Roots of Trust
Original Equipment Manufacturer (OEM)
Organizations
Iranian Nuclear Power Plant
advanced persistent threat
Hardware
firmware
data integrity
computer network security
BIOS Integrity Measurement
BIOS integrity
Biological system modeling
basic input output system
Advanced Persistent Threat (APT)
biblio
Scalable Packet Classification for Datacenter Networks
Submitted by BrandonB on Wed, 05/06/2015 - 11:58am
IP networks
VLANs
VLAN
virtual machines
telecommunication network routing
storage penalty
Software
Scalability
router architectures
packet forwarding
packet classification
Local area networks
length combinations
classification rules
Indexes
hash table
hardware parallelism
Hardware
firewalls
encoding
encoded rule expansion
Decision trees
datacenter networks
datacenter network
data structures
computer centres
biblio
Main-Memory Hash Joins on Modern Processor Architectures
Submitted by BrandonB on Wed, 05/06/2015 - 11:55am
Hardware
Instruction sets
Latches
Multicore processing
Probes
tuning
biblio
An FPGA implementation of high-throughput key-value store using Bloom filter
Submitted by BrandonB on Wed, 05/06/2015 - 11:52am
arrays
Bloom filter
cuckoo hashing algorithm
data structures
field programmable gate arrays
file organisation
FPGA
FPGA implementation
Hardware
hash tables
high-throughput key-value store
Information filters
Key-value Store
Random access memory
Software
biblio
Efficient and Concurrent Reliable Realization of the Secure Cryptographic SHA-3 Algorithm
Submitted by BrandonB on Wed, 05/06/2015 - 11:49am
injection-based fault simulations
Transient analysis
step-forward toward
SHA-3 algorithm
security
secure hash algorithm (SHA)-3
secure hash algorithm
rotated operand-based scheme
robust hardware implementations
Reliability
pseudorandom number generation
performance overheads
parallel processing
low-complexity recomputing
Keccak
integrity checking
acceptable complexity
high-performance concurrent error detection scheme
high performance
hashing
hardware overhead reduction
Hardware
error detection
error coverage
Cryptography
concurrency control
computational complexity
Circuit faults
ASIC analysis
Application-specific integrated circuit (ASIC)
application specific integrated circuits
Algorithm design and analysis
biblio
Reverse Engineering Digital Circuits Using Structural and Functional Analyses
Submitted by BrandonB on Wed, 05/06/2015 - 11:42am
reverse engineering
integrated circuit design
integrated circuits
intellectual property
invasive software
IP theft
IP violation detection
Logic gates
register files
Inference algorithms
SoC design
structural analysis
subtractors
system-on-chip
test circuits
Trojan horses
unstructured netlist
very large highly-optimized system-on-chip design
functional analysis
Algorithm design and analysis
algorithmic reverse engineering digital circuits
combinational elements
computer security
counters
design automation
Digital circuits
formal verification
adders
Globalization
globalized multivendor environment
Hardware
hardware trojans-malware
high-level netlist
ICs
industrial property
biblio
Hardware Trojan Attacks: Threat Analysis and Countermeasures
Submitted by BrandonB on Wed, 05/06/2015 - 11:40am
information processing
Trojan tolerance
Trojan taxonomy
Trojan horses
Trojan detection
threat analysis
side-channel analysis
self-referencing
reactive protection approach
proactive protection approach
invasive software
integrated circuits
Integrated circuit modeling
Circuit faults
hardware Trojan attacks
hardware Trojan attack
hardware obfuscation
Hardware intellectual property (IP) trust
Hardware
global economic trend
fabrication
electronics industry
electronic hardware malicious modifications
computer system security
computer security
biblio
Applied formal methods for hardware Trojan detection
Submitted by BrandonB on Wed, 05/06/2015 - 11:38am
integrated circuits
verification techniques
Vectors
Trojan horses
Trojan assurance level
silicon structure
model checking
Mathematical model
malicious hardware modifications
invasive software
chip development process
integrated circuit design
Hardware
formal verification
formal methods
formal hardware Trojan detection
Equations
electronic engineering computing
design phase
data structures
biblio
Real-time trust evaluation in integrated circuits
Submitted by BrandonB on Wed, 05/06/2015 - 11:37am
power-gating techniques
Trojan-infected variants
Trojan-free variants
Trojan horses
testing
statistical analysis
side-channel measurements
side-channel fingerprinting detection
shift registers
Semiconductor device measurement
reconfigurable linear feedback shift register array
real-time trust evaluation framework
advanced design skills
Power measurement
Power demand
post-fabrication trust evaluation methods
on-board global power consumption
LFSR array
invasive software
integrated circuits
hardware Trojan detection
Hardware
Erbium
chip trustworthiness
biblio
EM-based detection of hardware trojans on FPGAs
Submitted by BrandonB on Wed, 05/06/2015 - 11:37am
Layout
Xilinx Virtex-II Pro target
Trojan placement
Trojan horses
Software
side-channel analysis
sequential denial-of-service
RapidSmith
Probes
malicious circuitry
logic design
AES design
invasive software
Hardware Trojan injection
hardware Trojan detection
Hardware
FPGA
field programmable gate arrays
EM-based detection
EM measurement
electromagnetic emanation
Clocks
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