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National Science Foundation

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

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EDA

biblio

Visible to the public Trends on EDA for low power

Submitted by grigby1 on Wed, 03/08/2017 - 1:54pm
  • state-of-the-art microprocessors
  • low-power electronics
  • microprocessor chips
  • optimization
  • Physical design
  • power consumption
  • Power demand
  • power optimization
  • pubcrawl170110
  • Low power
  • transistor circuits
  • transistor layout
  • transistor network
  • transistor sizing
  • Transistors
  • visualization
  • visualization tools
  • AD 2012
  • Logic gates
  • Libraries
  • layout design automation tool
  • Layout
  • ISPD Contest
  • integrated circuit layout
  • electronic design automation
  • EDA algorithms
  • EDA
  • discrete gate sizing
  • continuous gate sizing
  • cell library
  • Algorithms
  • Algorithm design and analysis
  • AD 2013

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