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National Science Foundation

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

CPS-VO

IP blocks

biblio

Visible to the public MUTARCH: Architectural diversity for FPGA device and IP security

Submitted by grigby1 on Tue, 01/23/2018 - 3:24pm
  • policy-based governance
  • IP security
  • logical configuration keys
  • logic circuits
  • microprocessor chips
  • modern remote upgrade techniques
  • MUTARCH
  • physical configuration keys
  • Policy
  • IP piracy
  • pubcrawl
  • Resiliency
  • security through diversity principle
  • static keys
  • Table lookup
  • time-varying keys
  • Transforms
  • unauthorized in-field reprogramming
  • field programmable gate arrays
  • automotive systems
  • biomedical systems
  • bitstream encryption
  • collaboration
  • composability
  • configuration file
  • diverse applications
  • encryption
  • architectural diversity
  • FPGA device
  • Hardware
  • in-field reconfiguration
  • intellectual property blocks
  • Internet of Things
  • IoT
  • IP blocks
biblio

Visible to the public Detection of hardware Trojan in SEA using path delay

Submitted by BrandonB on Wed, 05/06/2015 - 11:33am
  • HTH detection and insertion
  • Trojan horses
  • Trojan circuits
  • SEA crypto
  • scalable encryption algorithm crypto
  • Scalable Encryption Algorithm (SEA)
  • payload Trojan detection rate
  • payload Trojan
  • path delay
  • Logic gates
  • logic circuits
  • layout level Trojan insertions
  • IP blocks
  • invasive software
  • Algorithm design and analysis
  • hardware Trojan horses insertion
  • Hardware Trojan horses (HTH)
  • hardware Trojan detection
  • Hardware
  • GDSII hard macros
  • GDSII
  • gate level Trojan insertions
  • fabless design house
  • encryption
  • delays
  • Cryptography
  • ASIC design flow
  • application specific integrated circuits

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