IP piracy

biblio

ATPG-Guided Fault Injection Attacks on Logic Locking

Submitted by aekwall on Mon, 10/04/2021 - 12:53pm

Human behavior
pattern locks
semiconductor lasers
logic locking
laser theory
IP piracy
IC overproduction
Fault injection
differential fault analysis
Logic gates
Resiliency
Scalability
pubcrawl
resilience
tools
Circuit faults
security

biblio

SeqL: Secure Scan-Locking for IP Protection

Submitted by grigby1 on Wed, 08/11/2021 - 2:28pm

pubcrawl
policy-based governance
collaboration
resilience
Resiliency
composability
ip protection
IP piracy
logic locking
Scan-chains

biblio

Attacking Split Manufacturing from a Deep Learning Perspective

Submitted by aekwall on Mon, 11/09/2020 - 12:42pm

integrated circuit split manufacturing
integrated circuit manufacture
Foundries
back-end-of-line parts
BEOL connections
different foundries
FEOL facility
front-end-of-line
image-based features
IP piracy
ISCAS-85benchmarks
layout-level placement
Metals
network-flow attack
security promise
sophisticated deep neural network
vector-based features
neural nets
invasive software
computer architecture
learning (artificial intelligence)
Resiliency
pubcrawl
composability
policy-based governance
deep learning
security of data
manufacturing systems
Capacitance
industrial property
Image Processing
Wires
Layout
Pins

biblio

A Cellular Automata Guided Obfuscation Strategy For Finite-State-Machine Synthesis

Submitted by aekwall on Mon, 11/09/2020 - 12:41pm

reverse engineering
testable key-controlled FSM synthesis scheme
state-transition
reverse engineering attacks
nongroup additive cellular automata
finite-state-machine synthesis
digital system
D1*CAdual
D1*CA
cellular automata guided obfuscation strategy
ip protection
IP piracy
cellular automata
security
flip-flops
Additives
finite state machines
Silicon
automata
industrial property
Logic gates
policy-based governance
composability
pubcrawl
Resiliency

biblio

Low-Overhead Robust RTL Signature for DSP Core Protection: New Paradigm for Smart CE Design

Submitted by aekwall on Mon, 11/09/2020 - 12:41pm

low-overhead robust RTL signature
FIR filters
IP piracy
flip-flops
covert signature embedding process
digital signal processor
DSP core protection
DSP-MP IP core
IP vendors
FIR filter
Multimedia Processor
nonsignature FIR RTL design
register-transfer level
reusable Intellectual Property cores
robust IP owner
secured smart CE device
smart CE design
smart Consumer Electronics devices
Registers
Hardware
Resiliency
pubcrawl
composability
policy-based governance
digital signatures
microprocessor chips
Multiplexing
IP networks
digital signal processing chips
Finite impulse response filters
adders
logic circuits
logic design
Latches
Consumer electronics

biblio

Mesh Based Obfuscation of Analog Circuit Properties

Submitted by aekwall on Mon, 11/09/2020 - 12:41pm

satisfiability modulo theory based algorithm
Design methodology
effective transistor dimensions
enhanced security
key based obfuscation technique
LC tank voltage-controlled oscillator
mesh topology
obfuscated circuitry
obfuscated transistors
obfuscation methodology
physical dimensions
SAT
circuit functionality
SMT
target frequency
transistor circuits
transistor sizes
Transistors
varactor transistor
Varactors
VCO
voltage amplitude
voltage-controlled oscillators
encryption key
Resiliency
pubcrawl
composability
policy-based governance
probability
Topology
reverse engineering
computability
operating frequency
Threshold voltage
Cryptography
circuit design
IP piracy
2×6 mesh structure
analog circuit properties
Analog circuits
analog obfuscation
analog satisfiability algorithm
aSAT algorithm
auto-determine
Brute Force Attack

biblio

Enhanced Functional Obfuscation of DSP core using Flip-Flops and Combinational logic

Submitted by aekwall on Mon, 11/09/2020 - 12:40pm

block logic
Trojan insertion
IP core locking block logic
Intellectual Property cores
Integrated Circuit design flow
ILB
hardware threats
functionally obfuscated design
functional obfuscation based security mechanism
functional obfuscation
flip-flops
flip-flop
DSP design
digital signal processing core
consumer electronics systems
combinational logic
Cryptography
IP core
IC design flow
IP piracy
Consumer electronics
combinational circuits
DSP
logic design
DSP core
digital signal processing chips
industrial property
policy-based governance
composability
pubcrawl
Resiliency

biblio

DLockout: A Design Lockout Technique for Key Obfuscated RTL IP Designs

Submitted by aekwall on Mon, 11/09/2020 - 12:40pm

nondestructive manner
Datapath
datapath intensive IPs
Design Lockout
DLockout
key obfuscated RTL IP designs
key obfuscated RTL module
key obfuscation
key-based obfuscation techniques
legacy IP
common side-channel attacks
obfuscation logic output
overproduction
robust design lockout technique
RTL Obfuscation
semiconductor supply chain
storage capacity 128 bit
storage capacity 32 bit
storage capacity 64 bit
typical design corner
Computer crime
Cryptography
Hardware
security
Software
Resiliency
pubcrawl
composability
policy-based governance
logic locking
IP networks
process control
reverse engineering
Integrated circuit modeling
Registers
logic circuits
controller
IP piracy
applied key

biblio

Hardware Steganography for IP Core Protection of Fault Secured DSP Cores

Submitted by aekwall on Mon, 11/09/2020 - 12:40pm

DSP based IP cores
vendor defined signature
transient fault secured IP cores
signature size
signature free approach
multimedia cores
IP core protection
IP core
high level synthesis
hardware steganography
fault secured DSP cores
Fault secure
entropy value
entropy thresholding
encoding rule
Resiliency
colored interval graph
IP piracy
Steganography
DSP
logic design
digital signal processing chips
Watermarking
industrial property
digital signatures
Entropy
graph theory
policy-based governance
composability
pubcrawl

biblio

BLIC: A Blockchain Protocol for Manufacturing and Supply Chain Management of ICS

Submitted by aekwall on Mon, 11/09/2020 - 12:33pm

active IC transactions
distributed ledger
ICs
integrated circuit design
Watermarking
electronic engineering computing
blockchain protocol
IP piracy
split manufacturing
blockchain technology
advanced technologies
BLIC protocol
composite consensus protocol
deleterious design modification
huge paradigm shift
IC supply chains
passive IC transactions
blockchain
data privacy
Hardware
Protocols
Resiliency
pubcrawl
composability
policy-based governance
Peer-to-peer computing
Cryptography
Computer crime
supply chain management
supply chains
manufacturing
cryptocurrencies
smart contracts
integrated circuits

1
2
3
4
next ›
last »

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

IP piracy

ATPG-Guided Fault Injection Attacks on Logic Locking

SeqL: Secure Scan-Locking for IP Protection

Attacking Split Manufacturing from a Deep Learning Perspective

A Cellular Automata Guided Obfuscation Strategy For Finite-State-Machine Synthesis

Low-Overhead Robust RTL Signature for DSP Core Protection: New Paradigm for Smart CE Design

Mesh Based Obfuscation of Analog Circuit Properties

Enhanced Functional Obfuscation of DSP core using Flip-Flops and Combinational logic

DLockout: A Design Lockout Technique for Key Obfuscated RTL IP Designs

Hardware Steganography for IP Core Protection of Fault Secured DSP Cores

BLIC: A Blockchain Protocol for Manufacturing and Supply Chain Management of ICS