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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
clock cycle
biblio
Secured Dual-Rail-Precharge Mux-based (DPMUX) symmetric-logic for low voltage applications
Submitted by grigby1 on Mon, 06/11/2018 - 3:48pm
processed data
Metrics
Microelectronics Security
PAA
power analysis attacks
power consumption
Power dissipation
private key cryptography
probability
Probability distribution
low-power electronics
pubcrawl
resilience
Resiliency
secret cryptographic keys
secured dual-rail-precharge mux
side channel attack
Signal to noise ratio
Switches
DPMUX symmetric-logic
average power dissipation
clock cycle
combinatorial logic
composability
cryptographic algorithms
Cryptography
delays
deterministic power
Digital circuits
activity factor
dynamic switching energy
Hardware implementations
Information Leakage
linear relationship
logic circuits
logic design
Logic gates
low voltage applications
