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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
Space exploration
biblio
Networks-on-Chip based Deep Neural Networks Accelerators for IoT Edge Devices
Submitted by grigby1 on Fri, 05/15/2020 - 12:45pm
low-power electronics
system-on-chip
Space exploration
resource-constrained embedded devices
performance evaluation
On-chip communication
NoC-based deep neural network accelerators
Neurons
neural chips
network-on-chip
network routing
memory size
Memory management
Measurement
massive parallel cores
network on chip security
IoT edge devices
Internet of Things
integrated circuit design
Energy analysis
Design Space Exploration
deep neural network inferences
Deep Neural Network accelerator
circuit optimisation
Artificial Neural Networks
Metrics
Resiliency
resilience
Scalability
biblio
Journey Beyond Full Abstraction: Exploring Robust Property Preservation for Secure Compilation
Submitted by aekwall on Mon, 12/02/2019 - 12:08pm
robust preservation
hyperproperties
linked adversarial code
linked adversarial target code
linked source code
linked target code
liveness
low-level target language
multiple programs
noninterference
property classes
relational hyperproperties
relational properties
good programming languages
robust property preservation
secure compilation
secure compilation chain
Secure interoperability
secure linking
Security Foundations
source language
source-level abstraction
strictly stronger security guarantees
supported security goals
trace properties
compiler security
Compositionality
security of data
Scalability
Resiliency
pubcrawl
Cryptography
Metrics
Libraries
program diagnostics
program verification
Writing
Space exploration
Security Properties
Safety
program compilers
secure code
source program
adversarial contexts
arbitrary adversarial contexts
compiled program
Computer languages
equivalent property-free
formal secure compilation criteria
full abstraction
fully abstract compilation chain
biblio
Overview on Moving Target Network Defense
Submitted by aekwall on Mon, 09/09/2019 - 10:47am
Scalability
Predictive Metrics
Space exploration
route mutation
research hotspot
port mutation
numerous related works
multiple mutation
MTND
MTD
moving target network defense
IP address and port mutation
IP address
fingerprint mutation
security of data
network level
Fingerprint recognition
Communication networks
internet
Synchronization
pubcrawl
Resiliency
network security
moving target defense
security
IP networks
computer network security
biblio
Improving Power amp; Latency Metrics for Hardware Trojan Detection During High Level Synthesis
Submitted by grigby1 on Mon, 12/10/2018 - 11:42am
Mathematical model
work factor metrics
Unroll Factor
Trojan horses
third party IP cores
Space exploration
semiconductor industry
secure IC design process
Scalability
resource allocation
Resiliency
resilience
pubcrawl
power metrics
power consumption
microprocessor chips
adders
latency metrics
invasive software
integrated circuits
integrated circuit design
integrated chip design
high level synthesis
hardware Trojan detection
hardware trojan
Hardware
design-for-trust techniques
design space exploration process
Design Space Exploration
datapath resource allocation
cuckoo search algorithm
Benchmark testing
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