field programmable gate arrays

biblio

EM-based detection of hardware trojans on FPGAs

Submitted by BrandonB on Wed, 05/06/2015 - 10:37am

Layout
Xilinx Virtex-II Pro target
Trojan placement
Trojan horses
Software
side-channel analysis
sequential denial-of-service
RapidSmith
Probes
malicious circuitry
logic design
AES design
invasive software
Hardware Trojan injection
hardware Trojan detection
Hardware
FPGA
field programmable gate arrays
EM-based detection
EM measurement
electromagnetic emanation
Clocks

biblio

LUT based secure cloud computing #x2014; An implementation using FPGAs

Submitted by BrandonB on Tue, 05/05/2015 - 8:24am

Games
Table lookup
suitable hardware platform
security requirements
security of data
secure cloud computing scheme
program security
pattern clustering
LUT based secure cloud computing
look-up table
k-means clustering algorithm
Big Data
FPGA
Formalization
field programmable gate arrays
encryption
data sharing
data security problem
cryptographic techniques
Cloud Computing
big data processing

biblio

New paradigms for access control in constrained environments

Submitted by BrandonB on Mon, 05/04/2015 - 1:53pm

Internet of Things
tamper-proof secret keys
standard compliant security protocols
Servers
SCADA
Reliability
PUF
private key cryptography
physical unclonable functions
Oscillators
open systems
mobile computing
message authentication
IoT
interoperability
Access Control
identity management framework
field programmable gate arrays
eSIM
embedded subscriber identity module
constrained resource server
constrained M2M devices
cellular connectivity
Building automation
authorization scheme
authorization
authorisation
authentication
access management framework

biblio

Reconfigurable Dynamic Trusted Platform Module for Control Flow Checking

Submitted by BrandonB on Fri, 05/01/2015 - 8:10am

Pipelines
Trusted Computing
stack smashing
Software
security of data
security
Runtime Security
runtime attacks
Runtime
reconfigurable dynamic trusted platform module
Reconfigurable Architecture
processor pipeline
Benchmark testing
Instruction Set Architecture
FPGA
formal verification
field programmable gate arrays
dynamic TPM design
Dynamic TPM
control flow checking
computer architecture
code reuse
buffer overflow

biblio

CorteXlab: A facility for testing cognitive radio networks in a reproducible environment

Submitted by BrandonB on Fri, 05/01/2015 - 7:06am

Minus
wireless sensor networks
universal software radio peripherals
testing facility
testing
software radio
software defined radio
SensLAB
SDR nodes
reproducible environment
PicoSDR nodes
Orbits
open-source toolkit GNU Radio
Nutaq
National Instruments
cognitive radio
MIMO
IoT-Lab wireless sensor nodes
Internet of Things
Interference
Hikob
field programmable gate arrays
electromagnetically shielded room
electromagnetic shielding
CorteXlab facility
controllers
controller
complex multinode cognitive radio scenarios
complex heterogeneous system scenarios
cognitive radio networks

biblio

Error value driven fault analysis attack

Submitted by BrandonB on Fri, 05/01/2015 - 6:56am

advanced encryption standard
AES
Ciphers
Circuit faults
cryptographic circuits
Cryptography
encryption
Equations
Error value
error value driven fault analysis attack method
Fault analysis attacks
field programmable gate arrays
Side-channel attack
standards
Tamper resistance

biblio

A secure and unclonable embedded system using instruction-level PUF authentication

Submitted by BrandonB on Thu, 04/30/2015 - 1:26pm

Benchmark testing
delays
embedded systems
field programmable gate arrays
instruction-level PUF authentication
microprocessor chips
processor execution environment
secure embedded system
security
unclonable embedded system
Xilinx Spartan6-based FPGA board

biblio

Design, implementation and security analysis of Hardware Trojan Threats in FPGA

Submitted by BrandonB on Thu, 04/30/2015 - 12:41pm

integrated circuits
RoT
security
denial of service
design
encryption
field programmable gate arrays
FPGA testbed
Hardware
hardware Trojan detection technique
hardware Trojan threats
Hardware Trojans
HDM
HTT detectability metric
HTT detection
ICs
timing variation
integrated logic circuits
invasive software
missed detection probability
normalized physical parameters
optimal detection threshold
power consumption
Power demand
Resiliency
root of trust
Security analysis
sensitive information leak
summation of false alarm
timing
Trojan taxonomy
Trojan horses

biblio

Attacks and Defenses in the Data Plane of Networks

Submitted by Heather Lucas on Wed, 09/17/2014 - 5:33pm

NetFPGA
software-programmable network processors
software vulnerabilities
security issues
Routing protocols
programmable router
Program processors
processing monitor
packet processing software
packet forwarding
network security
network routers
network processor
network attack
Computer crime
logic devices
internet
hardware-based defense mechanism
field programmable gate arrays
embedded systems
embedded system security
denial-of-service attack
data plane
custom-logic hardware
control plane
computer networks
computer network security

« first
‹ previous
…
6
7
8
9
10
11
12
13
14

Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

field programmable gate arrays

EM-based detection of hardware trojans on FPGAs

LUT based secure cloud computing #x2014; An implementation using FPGAs

New paradigms for access control in constrained environments

Reconfigurable Dynamic Trusted Platform Module for Control Flow Checking

CorteXlab: A facility for testing cognitive radio networks in a reproducible environment

Error value driven fault analysis attack

A secure and unclonable embedded system using instruction-level PUF authentication

Design, implementation and security analysis of Hardware Trojan Threats in FPGA

Attacks and Defenses in the Data Plane of Networks