field programmable gate arrays

biblio

Deep Packet Inspection in FPGAs via Approximate Nondeterministic Automata

Submitted by grigby1 on Fri, 07/03/2020 - 12:26pm

high-speed computer networks
Throughput
telecommunication traffic
suspicious network traffic
Scalability
Resiliency
resilience
regular expression matching
RE matching
pubcrawl
network intrusion detection systems
multistage architecture
intrusion detection system
Internet connection
internet
Acceleration
Hardware
FPGA architecture
finite automata
field programmable gate arrays
deep packet inspection
computer network security
computer architecture
automata
architecture
approximate reduction techniques
approximate reduction
approximate nondeterministic FAs
approximate nondeterministic automata

biblio

Deep Packet Inspection Through Virtual Platforms using System-On-Chip FPGAs

Submitted by grigby1 on Fri, 07/03/2020 - 12:26pm

resilience
virtual platforms
virtual platform
transaction level modeling
TLM
time-varying systems
time-domain analysis
system-on-chip FPGA
system-on-chip
system on chip
Software
search engines
Scalability
Resiliency
computer architecture
pubcrawl
Mentor Vista
logic design
Inspection
hybrid CPU/FPGA
hardware-IP based architecture
hardware accelerators
Hardware
field programmable gate arrays
ESL
deep packet inspection
CPU-DMA based architecture

biblio

DoS attack mitigation in SDN networks using a deeply programmable packet-switching node based on a hybrid FPGA/CPU data plane architecture

Submitted by aekwall on Mon, 06/29/2020 - 11:57am

deeply programmable packet-switching node
SDN
Firewalls (computing)
DoS
Software-Defined Networks
5G
data plane
denial-of-service attack
denial-of-service attacks
architectural model
deep network programmability
software-defined networking
DoS attack mitigation
DoS attack redirection
DoS attacks mitigation
DoS traffic
DPN
packet switching
packet-switching nodes
switches price
DDoS attack mitigation
computer network management
DDoS
field programmable gate arrays
FPGA
firewall
telecommunication traffic
authorisation
Hardware
Software
computer architecture
computer network security
SDN network
software defined networking
Resiliency
Human behavior
pubcrawl
composability
Metrics
internet
Filtering

biblio

Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs

Submitted by grigby1 on Fri, 06/12/2020 - 11:09am

high-quality hash functions
Resiliency
resilience
Registers
reconfigurable hash function
reconfigurable design
reconfigurable architectures
pubcrawl
network flow hashing
multiobjective linear genetic programming
Monitoring
Linear programming
IP networks
Compositionality
high speed computer networks
hash function design
hash algorithms
hardware acceleration
Hardware
genetic programming
genetic algorithms
FPGA
field programmable gate arrays
field programmable gate array
fast reconfigurable hash functions
Cryptography

biblio

A Nearest Neighbor Search Engine Using Distance-Based Hashing

Submitted by grigby1 on Fri, 05/22/2020 - 1:38pm

query processing
query point
high-dimensional data
hardware search engine
FPGA-based nearest neighbor search engine
flexible distance-based hashing
distance based hashing
nearest neighbor search algorithm
nearest neighbor search
file organisation
pubcrawl
search problems
search engines
nearest neighbour methods
Measurement
Metrics
parallel processing
field programmable gate arrays
FPGA

biblio

Accelerated Approximate Nearest Neighbors Search Through Hierarchical Product Quantization

Submitted by grigby1 on Fri, 05/22/2020 - 1:27pm

multiple low-dimensional codebooks
Cartesian product
FPGA-tailored architecture
hardware acceleration
hierarchical PQ
Hierarchical product Quantization
High-Dimensional Indexing
HPQ
mathematics computing
approximate search
nearest neighbor search
Online Indexing
product quantization
query answering
Regression
Search Space
similarity search
vector quantization
nearest neighbour methods
machine learning
pubcrawl
field programmable gate arrays
Artificial Intelligence
pattern classification
neural nets
Metrics
Measurement
learning (artificial intelligence)
search problems
regression analysis
classification
query processing
information retrieval
accelerated Approximate Nearest Neighbors search
ANN search

biblio

Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF

Submitted by grigby1 on Fri, 04/24/2020 - 11:02am

PUF
Monte Carlo analysis
Monte Carlo methods
oscillating behaviors
oscillating systems
Oscillators
physical unclonable functions
privacy
pubcrawl
Modeling Attacks
PUF architecture
resilience
Resiliency
Resistance
security
security of data
Unclonability
arbiter PUF
Metrics
Measurement
Mathematical model
learning (artificial intelligence)
Integrated circuit modeling
FPGA
field programmable gate arrays
Cryptography
conventional machine learning
composability
Chua's oscillator circuit
Chua's Oscillator
chaotic oscillator
chaotic behaviour
chaos

biblio

Research on LED lightweight cryptographic algorithm based on RFID tag of Internet of things

Submitted by aekwall on Mon, 03/23/2020 - 12:33pm

LED lightweight cryptographic algorithm
search problems
RFIDs
RFID tags
RFID tag chip
RFID tag
Resiliency
radiofrequency identification
radio frequency identification tags
pubcrawl
Piccolo cryptographic algorithm
light emitting diodes
LED lightweight cryptography
Algorithm
InvS-box
Internet of Things
Human behavior
FPGA
field programmable gate arrays
DPA protection technology threshold
DPA attack
Differential Power Analysis
Cryptography
Ciphers
Boolean functions
Boolean expression reconstruction

biblio

Statistical Power Analysis for IoT Device Oriented Encryption with Glitch Canceller

Submitted by grigby1 on Mon, 03/02/2020 - 12:33pm

Low-Power
Tamper resistance
statistical power analysis
statistical analysis
Side-channel attack
Scalability
pubcrawl
privacy
PRINCE
power consumption
Metrics
lowest latency cryptography
Big Data
IoT devise
IoT device oriented encryption
Internet of Things
Human Factors
Human behavior
Hardware Security
glitch canceller
field-programmable gate array
field programmable gate arrays
Cryptography

biblio

Countermeasure of Lightweight Physical Unclonable Function Against Side-Channel Attack

Submitted by grigby1 on Mon, 03/02/2020 - 12:32pm

message authentication
Training data
Tamper resistance
side-channel information
Side-channel attack
security of IoT
Scalability
pubcrawl
Power measurement
Power demand
power consumption
power aware computing
Physical Unclonable Function
modeling attack
Metrics
authentication
lightweight PUF
lightweight physical unclonable function
Internet of Things
internet
Integrated circuit modeling
Industrial Internet of Things
Human Factors
Human behavior
Hardware Security
field programmable gate arrays
external Internet
Cryptography
countermeasure method

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Cyber-Physical Systems Virtual Organization

Read-only archive of site from September 29, 2023.

field programmable gate arrays

Deep Packet Inspection in FPGAs via Approximate Nondeterministic Automata

Deep Packet Inspection Through Virtual Platforms using System-On-Chip FPGAs

DoS attack mitigation in SDN networks using a deeply programmable packet-switching node based on a hybrid FPGA/CPU data plane architecture

Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs

A Nearest Neighbor Search Engine Using Distance-Based Hashing

Accelerated Approximate Nearest Neighbors Search Through Hierarchical Product Quantization

Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF

Research on LED lightweight cryptographic algorithm based on RFID tag of Internet of things

Statistical Power Analysis for IoT Device Oriented Encryption with Glitch Canceller

Countermeasure of Lightweight Physical Unclonable Function Against Side-Channel Attack