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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
integrated logic circuits
biblio
Increasing the SAT Attack Resiliency of In-Cone Logic Locking
Submitted by grigby1 on Wed, 02/26/2020 - 3:48pm
Logic gates
security
satisfiability attack
SAT attack resiliency
SAT attack
Resiliency
resilience
removal attack
pubcrawl
MFFC based algorithm
maximum fanout free cones
manufacturing
logic locking
provable security
logic design
key gate selection
Iterative methods
integrated logic circuits
integrated circuits
in-cone techniques
in-cone logic locking
Hardware Security
Hardware
Electronics packaging
circuit netlist
biblio
Variation-Aware Hardware Trojan Detection through Power Side-Channel
Submitted by grigby1 on Fri, 03/15/2019 - 10:59am
integrated logic circuits
variation-aware hardware Trojan detection
Trojan-to-circuit power consumption
Trojan horses
trojan horse detection
side-channel analysis
Sensitivity
pubcrawl
process variation
power side-channel
Power demand
outsourcing
logic design
invasive software
Clock-tree Partition
integrated circuits
integrated circuit testing
HT detection sensitivity
HT activation chances
hardware trojan
Hardware
fine-grain circuit partitioning
Equal-power Partition
Detection sensitivity
Detectability
Cryptography
Clocks
biblio
Design, implementation and security analysis of Hardware Trojan Threats in FPGA
Submitted by BrandonB on Thu, 04/30/2015 - 12:41pm
integrated circuits
RoT
security
denial of service
design
encryption
field programmable gate arrays
FPGA testbed
Hardware
hardware Trojan detection technique
hardware Trojan threats
Hardware Trojans
HDM
HTT detectability metric
HTT detection
ICs
timing variation
integrated logic circuits
invasive software
missed detection probability
normalized physical parameters
optimal detection threshold
power consumption
Power demand
Resiliency
root of trust
Security analysis
sensitive information leak
summation of false alarm
timing
Trojan taxonomy
Trojan horses