"A novel simulation approach for fault injection resistance evaluation on smart cards"
Title | "A novel simulation approach for fault injection resistance evaluation on smart cards" |
Publication Type | Conference Paper |
Year of Publication | 2015 |
Authors | L. Rivière, J. Bringer, T. H. Le, H. Chabanne |
Conference Name | 2015 IEEE Eighth International Conference on Software Testing, Verification and Validation Workshops (ICSTW) |
Date Published | April |
Publisher | IEEE |
ISBN Number | 978-1-4799-1885-0 |
Accession Number | 15127214 |
Keywords | advanced encryption standard, AES, backward analyses, combined attack, complex smart card systems, control flow fault models, cryptography, Data models, data modification, EFS, embedded fault simulator, Embedded systems, fault injection, fault injection resistance evaluation, fault injection simulations, fault simulation, generic fault injection simulation tool, Hardware, instruction skip, multiple fault attacks, Object oriented modeling, Physical attack, pubcrawl170102, Registers, security, side-channel analyses, Side-channel attack, Smart card, smart card source code, smart cards, Software |
Abstract | Physical perturbations are performed against embedded systems that can contain valuable data. Such devices and in particular smart cards are targeted because potential attackers hold them. The embedded system security must hold against intentional hardware failures that can result in software errors. In a malicious purpose, an attacker could exploit such errors to find out secret data or disrupt a transaction. Simulation techniques help to point out fault injection vulnerabilities and come at an early stage in the development process. This paper proposes a generic fault injection simulation tool that has the particularity to embed the injection mechanism into the smart card source code. By its embedded nature, the Embedded Fault Simulator (EFS) allows us to perform fault injection simulations and side-channel analyses simultaneously. It makes it possible to achieve combined attacks, multiple fault attacks and to perform backward analyses. We appraise our approach on real, modern and complex smart card systems under data and control flow fault models. We illustrate the EFS capacities by performing a practical combined attack on an Advanced Encryption Standard (AES) implementation. |
URL | https://ieeexplore.ieee.org/document/7107460 |
DOI | 10.1109/ICSTW.2015.7107460 |
Citation Key | 7107460 |
- fault simulation
- Software
- smart cards
- smart card source code
- Smart card
- Side-channel attack
- side-channel analyses
- security
- Registers
- pubcrawl170102
- Physical attack
- Object oriented modeling
- multiple fault attacks
- instruction skip
- Hardware
- generic fault injection simulation tool
- advanced encryption standard
- fault injection simulations
- fault injection resistance evaluation
- Fault injection
- embedded systems
- embedded fault simulator
- EFS
- data modification
- Data models
- Cryptography
- control flow fault models
- complex smart card systems
- combined attack
- backward analyses
- AES