A Dynamic-Key Secure Scan Structure Against Scan-Based Side Channel and Memory Cold Boot Attacks
Title | A Dynamic-Key Secure Scan Structure Against Scan-Based Side Channel and Memory Cold Boot Attacks |
Publication Type | Conference Paper |
Year of Publication | 2018 |
Authors | Wu, C., Kuo, M., Lee, K. |
Conference Name | 2018 IEEE 27th Asian Test Symposium (ATS) |
Date Published | oct |
Keywords | Chained Attacks, Clocks, Controllability, cryptography, design for test technology, design for testability, Discrete Fourier transforms, dynamic key generation, dynamic-key secure DFT structure, dynamic-key secure scan structure, Flip-flops, Generators, hardware security, integrated circuit testing, memory attack, memory attacks, memory cold boot attack, pubcrawl, Random access memory, resilience, Resiliency, Scalability, scan design key generator, secure scan architecture, security, security level, side channel attack, Side-channel attack |
Abstract | Scan design is a universal design for test (DFT) technology to increase the observability and controllability of the circuits under test by using scan chains. However, it also leads to a potential security problem that attackers can use scan design as a backdoor to extract confidential information. Researchers have tried to address this problem by using secure scan structures that usually have some keys to confirm the identities of users. However, the traditional methods to store intermediate data or keys in memory are also under high risk of being attacked. In this paper, we propose a dynamic-key secure DFT structure that can defend scan-based and memory attacks without decreasing the system performance and the testability. The main idea is to build a scan design key generator that can generate the keys dynamically instead of storing and using keys in the circuit statically. Only specific patterns derived from the original test patterns are valid to construct the keys and hence the attackers cannot shift in any other patterns to extract correct internal response from the scan chains or retrieve the keys from memory. Analysis results show that the proposed method can achieve a very high security level and the security level will not decrease no matter how many guess rounds the attackers have tried due to the dynamic nature of our method. |
URL | https://ieeexplore.ieee.org/document/8567409 |
DOI | 10.1109/ATS.2018.00020 |
Citation Key | wu_dynamic-key_2018 |
- memory attack
- Side-channel attack
- side channel attack
- security level
- security
- secure scan architecture
- scan design key generator
- Scalability
- Resiliency
- resilience
- Random access memory
- pubcrawl
- memory cold boot attack
- memory attacks
- Chained Attacks
- integrated circuit testing
- Hardware Security
- Generators
- flip-flops
- dynamic-key secure scan structure
- dynamic-key secure DFT structure
- dynamic key generation
- Discrete Fourier transforms
- design for testability
- design for test technology
- Cryptography
- Controllability
- Clocks