Hardware Design and Verification Techniques for Supply Chain Risk Mitigation
| Title | Hardware Design and Verification Techniques for Supply Chain Risk Mitigation |
| Publication Type | Conference Paper |
| Year of Publication | 2015 |
| Authors | Liu, B., Jin, Y., Qu, G. |
| Conference Name | 2015 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics) |
| Keywords | concurrent checking, concurrent engineering, counterfeiting, design automation, Fingerprinting, Foundries, Hardware, IC misusing, IC obfuscation, integrated circuit design, integrated circuits, metering, overbuilding, pubcrawl170112, supply chain management, supply chain security risks mitigation, Supply chains, Watermarking |
| Abstract | We present a brief survey on the state-of-the-art design and verification techniques: IC obfuscation, watermarking, fingerprinting, metering, concurrent checking and verification, for mitigating supply chain security risks such as IC misusing, counterfeiting and overbuilding. |
| DOI | 10.1109/CADGRAPHICS.2015.53 |
| Citation Key | liu_hardware_2015 |
- integrated circuit design
- Watermarking
- supply chains
- supply chain security risks mitigation
- supply chain management
- pubcrawl170112
- overbuilding
- metering
- integrated circuits
- concurrent checking
- IC obfuscation
- IC misusing
- Hardware
- Foundries
- Fingerprinting
- design automation
- counterfeiting
- concurrent engineering