Visible to the public An Efficient Memory Zeroization Technique Under Side-Channel Attacks

TitleAn Efficient Memory Zeroization Technique Under Side-Channel Attacks
Publication TypeConference Paper
Year of Publication2019
AuthorsSrivastava, Ankush, Ghosh, Prokash
Conference Name2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID)
Keywordsbuilt-in self test, compositionality, content protection, cryptographic keys, cryptography, data deletion, efficient memory zeroization technique, Engines, Hardware, MBIST based content zeroization approach, memory built-in-self-test hardware, Memory management, memory security, Memory Zeroization, on-chip memory contents, private memory contents, pubcrawl, Random access memory, random-access storage, remanence, Resiliency, secret data, secured data content, security, security attacks, security of data, security violations, Side-channel attack, side-channel attacks, system-on-chip, Temperature sensors, volatile memories
AbstractProtection of secured data content in volatile memories (processor caches, embedded RAMs etc) is essential in networking, wireless, automotive and other embedded secure applications. It is utmost important to protect secret data, like authentication credentials, cryptographic keys etc., stored over volatile memories which can be hacked during normal device operations. Several security attacks like cold boot, disclosure attack, data remanence, physical attack, cache attack etc. can extract the cryptographic keys or secure data from volatile memories of the system. The content protection of memory is typically done by assuring data deletion in minimum possible time to minimize data remanence effects. In today's state-of-the-art SoCs, dedicated hardwares are used to functionally erase the private memory contents in case of security violations. This paper, in general, proposes a novel approach of using existing memory built-in-self-test (MBIST) hardware to zeroize (initialize memory to all zeros) on-chip memory contents before it is being hacked either through different side channels or secuirty attacks. Our results show that the proposed MBIST based content zeroization approach is substantially faster than conventional techniques. By adopting the proposed approach, functional hardware requirement for memory zeroization can be waived.
DOI10.1109/VLSID.2019.00032
Citation Keysrivastava_efficient_2019