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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
built-in self test
biblio
An Efficient Memory Zeroization Technique Under Side-Channel Attacks
Submitted by aekwall on Mon, 02/24/2020 - 9:55am
built-in self test
volatile memories
side-channel attacks
Side-channel attack
security violations
secured data content
secret data
random-access storage
private memory contents
on-chip memory contents
Memory Zeroization
memory security
memory built-in-self-test hardware
MBIST based content zeroization approach
efficient memory zeroization technique
content protection
security of data
Temperature sensors
cryptographic keys
remanence
Compositionality
Engines
Random access memory
data deletion
security attacks
pubcrawl
Resiliency
system-on-chip
security
Memory management
Hardware
Cryptography
biblio
Diagnosis of multiple faults with highly compacted test responses
Submitted by BrandonB on Wed, 05/06/2015 - 1:31pm
field return analysis
yield ramp-up
Response Compaction
process learning
probability
Multiple Faults
multiple fault probability
multiple fault diagnosis
MISR compactor
Mathematical model
logic diagnosis
linear properties
integrated circuit yield
integrated circuit testing
Accuracy
faulty signatures
fault diagnosis
Equations
embedded test
Diagnosis
defects cluster
compressed test responses
Compaction
compacted test responses
Circuit faults
built-in self-test
built-in self test
