| Title | A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms |
| Publication Type | Conference Paper |
| Year of Publication | 2019 |
| Authors | Šišejković, Dominik, Merchant, Farhad, Leupers, Rainer, Ascheid, Gerd, Kiefer, Volker |
| Conference Name | 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) |
| Keywords | Boolean satisfiability attack, compositionality, computability, Computer crime, cryptography, Encryption, Hardware, hardware security, Hardware Trojans, industrial property, integrated circuit supply chain, integrated circuits, intellectual property piracy, invasive software, logic encryption, logic encryption techniques, Logic gates, low-cost countermeasures, Metrics, modern logic encryption algorithms, paradigm shift, provable security, pubcrawl, resilience, Resiliency, SAT attack, structural corruption |
| Abstract | The globalization of the integrated circuit supply chain has given rise to major security concerns ranging from intellectual property piracy to hardware Trojans. Logic encryption is a promising solution to tackle these threats. Recently, a Boolean satisfiability attack capable of unlocking existing logic encryption techniques was introduced. This attack initiated a paradigm shift in the design of logic encryption algorithms. However, recent approaches have been strongly focusing on low-cost countermeasures that unfortunately lead to low functional and structural corruption. In this paper, we show that a simple approach can offer provable security and more than 99% corruption if a higher area overhead is accepted. Our results strongly suggest that future proposals should consider higher overheads or more realistic circuit sizes for the evaluation of modern logic encryption algorithms. |
| DOI | 10.1109/VLSI-DAT.2019.8741531 |
| Citation Key | sisejkovic_critical_2019 |
A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms