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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
SAT attack
biblio
SRTLock: A Sensitivity Resilient Two-Tier Logic Encryption Scheme
Submitted by grigby1 on Fri, 07/29/2022 - 9:45am
standards
pattern locks
Sensitivity Attack
logic design
0-Injection
sensitivity analysis
SAT attack
logic encryption
Benchmark testing
Logic gates
Scalability
Hardware Security
Hardware
Resiliency
resilience
Human behavior
pubcrawl
encryption
biblio
High-level Intellectual Property Obfuscation via Decoy Constants
Submitted by grigby1 on Wed, 06/08/2022 - 10:21am
intellectual property security
SAT attack
reverse engineering
Resiliency
resilience
pubcrawl
policy-based governance
Logic gates
IP obfuscation
pattern locks
intellectual property
hardware obfuscation
Hardware
Foundries
digital FIR filter design
composability
Complexity theory
automatic test pattern generation
biblio
On Preventing SAT Attack with Decoy Key-Inputs
Submitted by aekwall on Fri, 02/25/2022 - 10:44am
logic locking
Very large scale integration
Switches
supply chains
SAT attack
Resistance
Resiliency
pubcrawl
provable security
Predictive Metrics
overproduction
Tamper resistance
ip protection
intellectual property
Hardware Security
design-for-trust
control systems
computer architecture
Compositionality
Human Factors
Metrics
Scalability
biblio
A Novel PUF based Logic Encryption Technique to Prevent SAT Attacks and Trojan Insertion
Submitted by aekwall on Mon, 11/09/2020 - 1:33pm
intellectual property/IC
IP piracy
SAT attack
hardware obfuscation
Anti-Trojan insertion algorithm
Controllability
copy protection
design-for-trust
hardware Trojan insertion
HT insertion
hardware trojan
logic encryption methods
logic encryption techniques
logic locking
PUF based logic encryption technique
PUF-based encryption
Rare Signal
reverse engineering attack
unique encryption
Hardware Security
encryption
Hardware
invasive software
Resiliency
pubcrawl
composability
policy-based governance
Trojan horses
integrated circuits
Cryptography
Topology
Logic gates
industrial property
reverse engineering
integrated circuit design
logic circuits
Physical Unclonable Function
encryption key
biblio
Is Robust Design-for-Security Robust Enough? Attack on Locked Circuits with Restricted Scan Chain Access
Submitted by aekwall on Tue, 09/08/2020 - 9:59am
locked circuits
Chained Attacks
working chip
unauthorized scan access
secret key recovery
scan chain
SAT attack
robust DFS technique
robust DFS design
robust design-for-security architecture
restricted scan chain access
logic locking security
logic locking attacks
Scalability
IP piracy
Boolean satisfiability based attack
benchmark circuits
ATPG
Boolean functions
logic circuits
computability
Security analysis
logic locking
pubcrawl
Resiliency
Cryptography
biblio
Resolving the Trilemma in Logic Encryption
Submitted by grigby1 on Fri, 04/03/2020 - 12:56pm
post SAT approaches
trilemma
traditional logic encryption algorithms
structural security
SAT attack
Resiliency
resilience
query complexity
pubcrawl
provable security
provable logic obfuscation
pre-SAT approaches
Compositionality
Metrics
logic resynthesis
logic design
logic circuits
locking robustness
locked circuit
hardware ip protection
error number
encryption efficiency
Cryptography
computability
biblio
A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms
Submitted by grigby1 on Fri, 04/03/2020 - 12:56pm
provable security
structural corruption
SAT attack
paradigm shift
modern logic encryption algorithms
low-cost countermeasures
logic encryption techniques
logic encryption
intellectual property piracy
integrated circuit supply chain
Hardware Trojans
computability
Boolean satisfiability attack
resilience
Logic gates
Compositionality
Metrics
invasive software
Computer crime
integrated circuits
industrial property
Hardware Security
Hardware
Resiliency
pubcrawl
encryption
Cryptography
biblio
Increasing the SAT Attack Resiliency of In-Cone Logic Locking
Submitted by grigby1 on Wed, 02/26/2020 - 4:48pm
Logic gates
security
satisfiability attack
SAT attack resiliency
SAT attack
Resiliency
resilience
removal attack
pubcrawl
MFFC based algorithm
maximum fanout free cones
manufacturing
logic locking
provable security
logic design
key gate selection
Iterative methods
integrated logic circuits
integrated circuits
in-cone techniques
in-cone logic locking
Hardware Security
Hardware
Electronics packaging
circuit netlist
