| Title | Random Number Generation Algorithms for Performance Testing |
| Publication Type | Conference Paper |
| Year of Publication | 2021 |
| Authors | Chittala, Abhilash, Bhupathi, Tharun, Alakunta, Durga Prasad |
| Conference Name | 2021 5th International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech) |
| Date Published | sep |
| Keywords | field programmable gate array, field programmable gate arrays, Generators, Human Behavior, linear feedback shift register, Logic gates, Logical Block Address, lookup table, Metrics, performance evaluation, Prediction algorithms, pubcrawl, random key generation, Random Performance, resilience, Resiliency, Scalability, solid state drives, Universal Serial Bus |
| Abstract | There are numerous areas relied on random numbers. As one knows, in Cryptography, randomness plays a vital role from key generation to encrypting the systems. If randomness is not created effectively, the whole system is vulnerable to security threats where an outsider can easily predict the algorithm used to generate the random numbers in the system. Another main application where one would not touch is the role of random numbers in different devices mainly storage-related like Solid State Drives, Universal Serial Bus (USB), Secure Digital (SD) cards random performance testing. This paper focuses on various novel algorithms to generate random numbers for efficient performance evaluation of different drives. The main metrics for performance testing is random read and write performance. Here, the biggest challenge to test the random performance of the drive is not only the extent to which randomness is created but also the testing should cover the entire device (say complete NAND, NOR, etc.). So, the random number generator should generate in such a way that the random numbers should not be able to be predicted and must generate the numbers covering the entire range. This paper proposes different methods for such generators and towards the end, discusses the implementation in Field Programmable Gate Array (FPGA). |
| DOI | 10.1109/IEMENTech53263.2021.9614832 |
| Citation Key | chittala_random_2021 |
Random Number Generation Algorithms for Performance Testing