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Cyber-Physical Systems Virtual Organization
Read-only archive of site from September 29, 2023.
CPS-VO
application specific integrated circuits
biblio
"Improved serial 2D-DWT processor for advanced encryption standard"
Submitted by grigby1 on Mon, 02/13/2017 - 1:08pm
Hardware
size 65 nm
serialized DT processor
serial 2D-DWT processor
secured image processing
RTL-GDSII
Quantization (signal)
pubcrawl170102
low power ASIC
lifting scheme algorithm
image data security
Image coding
high speed encryption
advanced encryption standard
frequency 333 MHz
encryption
DWT
discrete wavelet transforms
discrete wavelet transform
data compression
Cryptography
compression ratio
CMOS technology
ASIC circuit design
application specific integrated circuits
AES
biblio
Efficient and Concurrent Reliable Realization of the Secure Cryptographic SHA-3 Algorithm
Submitted by BrandonB on Wed, 05/06/2015 - 11:49am
injection-based fault simulations
Transient analysis
step-forward toward
SHA-3 algorithm
security
secure hash algorithm (SHA)-3
secure hash algorithm
rotated operand-based scheme
robust hardware implementations
Reliability
pseudorandom number generation
performance overheads
parallel processing
low-complexity recomputing
Keccak
integrity checking
acceptable complexity
high-performance concurrent error detection scheme
high performance
hashing
hardware overhead reduction
Hardware
error detection
error coverage
Cryptography
concurrency control
computational complexity
Circuit faults
ASIC analysis
Application-specific integrated circuit (ASIC)
application specific integrated circuits
Algorithm design and analysis
biblio
Detection of hardware Trojan in SEA using path delay
Submitted by BrandonB on Wed, 05/06/2015 - 11:33am
HTH detection and insertion
Trojan horses
Trojan circuits
SEA crypto
scalable encryption algorithm crypto
Scalable Encryption Algorithm (SEA)
payload Trojan detection rate
payload Trojan
path delay
Logic gates
logic circuits
layout level Trojan insertions
IP blocks
invasive software
Algorithm design and analysis
hardware Trojan horses insertion
Hardware Trojan horses (HTH)
hardware Trojan detection
Hardware
GDSII hard macros
GDSII
gate level Trojan insertions
fabless design house
encryption
delays
Cryptography
ASIC design flow
application specific integrated circuits
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